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J-Link—The Market Leading Debug Probe

SEGGER Debug Probes—J-Link

SEGGER J-Links are the most widely used line of debug probes available today. They've proven their value for more than 10 years in embedded development. This popularity stems from the unparalleled performance, extensive feature set, large number of supported CPUs, and compatibility with all popular development environments.

J-Link — The best choice to optimize your debugging and flash programming experience

With up to 3 MBytes/s download speed to RAM and record-breaking flashloaders, as well as the ability to set an unlimited number of breakpoints in flash memory of MCUs, the J-Link debug probes are undoubtedly the best choice to optimize your debugging and flash programming experience.

J-Link debug probes support ARM 7/9/11, Cortex-M/R/A, Microchip PIC32, Renesas RX CPUs as well as SPI flash devices. Here is the complete list of microcontrollers and SPI flash devices that are supported by J-Link.

The J-Link debug probes are supported by all major IDEs including Eclipse, GDB-based IDEs and SEGGER Embedded Studio. For a complete list, please refer to Supported IDEs.

Working with J-Link

J-Link can be used for programming flash targets with the J-Flash software or stand-alone.

Setting up J-Link for first use

In order to use J-Link for the first time you need to install the J-Link related software and documentation pack which, among others, includes the J-Flash software, and connect J-Link to the host PC via USB.

Download   J-Link Software and Documentation Pack for Windows

Download   J-Link Software and Documentation Pack for macOS

Download   J-Link Software and Documentation Pack, Linux DEB installer, 64bit

Download   J-Link Software and Documentation Pack, Linux RPM installer, 64bit

Download   J-Link Software and Documentation Pack, Linux TGZ installer, 64bit

Download   J-Link Software and Documentation Pack, Linux DEB installer, 32bit

Download   J-Link Software and Documentation Pack, Linux RPM installer, 32bit

Download   J-Link Software and Documentation Pack, Linux TGZ installer, 32bit

Download   J-Link Software and Documentation Pack

Connecting the target system

Power-on sequence

In general, J-Link should be powered on before connecting it with the target device. That means you should first connect J-Link with the host system via USB and then connect J-Link with the target device. Power-on the device after you connected J-Link to it.
If you use J-Link PRO with Ethernet, just power-on J-Link via external power supply.

Verifying target device connection with J-Link Commander

If the USB driver is working properly and your J-Link is connected with the host system, you may connect J-Link to your target hardware. Then start the J-Link command line tool JLink.exe, which should now display the normal J-Link related information. Now type connect and specify your target, and the target interface. Once done it should display a report about the connected CPU and its debug interface. The screenshot shows the output of JLink.exe. As can be seen, it reports a J-Link connected to an STM32F205 and the related information.

Start using J-Link with your favourite tool-chain.

To connect your J-Link with your development project, please consult the guide for your favourite tool-chain.

Supported IDEs

Full J-Link/J-Trace Support

The following table lists the IDEs fully supporting J-Link/J-Trace and the additional features of J-Link/J-Trace, which can be used with them.
All following IDEs have debug support, including: Download to flash and RAM, memory read/write, CPU register read/write, run control (go, step, halt), software breakpoints in RAM, hardware breakpoints in flash memory, and use of Unlimited Flash Breakpoints.

IDE Price1 Supported
devices
SWO
support3,4
Trace
support2
Short description
SEGGER Embedded Studio (for ARM/Cortex)

1,848$

FREE for educational purposes

Download Now

Cortex-M/R/A
ARM7/9/11

 

 

SEGGER Embedded Studio may be used free of charge when used for educational purposes!
(Learn More)

SEGGER Embedded Studio is a complete all-in-one solution for managing, building, testing, and deploying your embedded applications. Its Visual Studio-like style brings the intuitive usage to which PC developers are used to the embedded world of engineering.

SEGGER Embedded Studio (for Cortex-M) 1,248$ Cortex-M

 

 

SEGGER Embedded Studio is a complete all-in-one solution for managing, building, testing, and deploying your embedded applications. Its Visual Studio-like style brings the intuitive usage to which PC developers are used to the embedded world of engineering.
emIDE Free Cortex-M/R/A ARM7/9/11

4

 

Visual Studio style, free open source toolchain. Based on GCC and Code::Blocks. Easy to use and fast. Editor supports code folding, syntax highlighting, code completion, and project management. More info and download: emide.org
Eclipse Free Cortex-M/A/R ARM7/9/11

4

 

Eclipse plugins available for GNU ARM. Plugins have to be installed manually. Can be used with GCC toolchains. Base for common commercial IDEs.
Atmel Studio Free ATMEL SAM3/4/D20 only

4

 

Visual Studio style, free toolchain. Based on GCC and Visual Studio Express. Easy to use and fast. Editor supports code folding, syntax highlighting, code completion and project management. Supports Atmel devices only. J-Link is supported in Atmel Studio 6 and later.
CooCox CoIDE Free Cortex-M0/M3

4

 

Free Eclipse based IDE for ARM Cores, using GCC (not included).
Renesas e2Studio Free RX60x/61x/ 62x/63x N/A

 

Eclipse based, commercial toolchain for Renesas RX. Can be used with GCC Compiler or Renesas compiler (requires additional license).
iSystem WinIDEA Open Free Cortex-M

 

 

Visual Studio style, free toolchain. Based on GCC. Editor supports code folding, syntax highlighting, code completion and project management.
Freescale KDS Free Freescale Kinetis Cortex-M only

 

 

Free Eclipse based IDE. Supports Freescale Kinetis Cortex-M devices only.
Infineon DAVE Free Infineon XMC only

 

 

Free Eclipse based IDE. Supports Infineon XMC devices only.
NXP MCUXpresso Free Edition Free

Cortex-M
ARM7/9

 

 

Eclipse and GCC based IDE. No Code size limit. Supports NXP LPC / Kinetis ARM7/9 and Cortex-M devices only.
NXP LPCXpresso Free Edition Free Cortex-M ARM7/9/11

4

 

Eclipse based IDE for ARM cores. Code size limited to 256 KB. Supports NXP devices only.
Silicon Labs
Simplicity Studio
Free Silicon Labs Cortex-M and 8051 devices

 

 

Free Eclipse based IDE. Supports Silicon Labs Cortex-M and 8051 devices only.
System Workbench for STM32 Free ST STM32

4

 

Free Eclipse based IDE. Supports ST STM32 devices only.
SynProgs VisualGDB 89$ Cortex-M/R/A
ARM7/9/11 

4

 

Extension for Microsoft Visual Studio. Commercial. Can be used with GCC or LLVM.
Mentor Sourcery CodeBench 399$ Cortex-M/A ARM7/9/11

4

 

Eclipse and GCC based commercial toolchain. Supports ARM, IA32, MIPS and PowerPC architectures.
TI Code Composer Studio 445$ Cortex-M/R/A

 

 

Eclipse and GCC based commercial toolchain. Supports TI devices only.
NXP LPCXpresso Pro Edition 495$ Cortex-M ARM7/9/11

4

 

Eclipse based IDE for ARM cores. Supports NXP devices only.
Renesas HEW 1,200$ RX60x/61x/ 62x/63x N/A

 

Visual Studio style, commercial toolchain. Renesas or GCC compiler.
Rowley CrossWorks 1,500$ Cortex-M/R/A
ARM7/9/11

4

 

Flash download not available for ARM11. Visual Studio style, commercial toolchain. Based on GCC. Unlimited Flash Breakpoints available since CrossWorks V3.3.
Atollic TrueSTUDIO 2,300$ / Free Cortex-M/R/A
ARM7/9

 

 

Eclipse and GCC based commercial toolchain.
TASKING VX-toolset 2,300$ Cortex-M

4

 

Eclipse based commercial toolchain. Not GCC based. Supports Cortex-M devices.
IDA Pro incl. ARM Decompiler 3,800$ Cortex-M/R/A
ARM7/9/11

 

 

Multi-processor disassembler and debugger which supports multiple CPU architectures and supports J-Link via the GDB protocol. Available for Windows, OSX and Linux.
Freescale CodeWarrior 5,000$ Freescale Kinetis only

 

 

Eclipse and GCC based commercial toolchain. Supports Freescale devices only.
Keil MDK 5,300$ Cortex-M/R/A
ARM7/9

 

 

Visual Studio style, commercial toolchain. Non-GCC compiler.
IAR EWARM 6,000$ Cortex-M/R/A
ARM7/9

 

 

Visual Studio style, commercial toolchain. Non-GCC compiler.
IAR EWRX 6,000$ RX60x/61x/62x N/A

 

Visual Studio style, commercial toolchain. GCC compiler.
Microchip MPLAB X N/A Microchip PIC32 only

 

 

Free Eclipse based IDE. Requires a licence in order to use the Microchip XC32(++) compiler.
Cosmic ZAP N/A Cortex-M

 

 

Commercial debugger. Can be used stand-alone or in combination with Cosmic IDEA (IDE) and Cosmic Software C compiler.
Emprog Thunderbench N/A Cortex-M/R/A
ARM7/9

 

 

Eclipse based commercial toolchain. Not GCC based.

All information are collected to the best of our knowledge and belief. It may be subject to change and my be updated at any time. If you find any false or missing information, feel free to contact us at infosegger.com.

1 Prices are the approximated standard US prices for single user commercial use without code size / time limit. The prices are meant for comparison purposes and may not be up-to-date. For the current price, as well as other options, like evaluation or light versions of the software, please refer to the official website of the software vendor. If you think one of the prices is not accurate enough, feel free to contact us at infosegger.com.
2 Requires emulator with trace support. May not be supported with all devices.
3 May not be supported with all devices. Only available on Cortex-M/A/R devices.
4 Via J-Link SWO viewer (included in J-Link Software pack, no additional cost)

Limited J-Link/J-Trace Support

IDEPrice1Supported devicesSWO support3Trace support2Limitations and short description
ARM Developer Suite (ADS) V1.2.1N/AARM7/9N/A

 

Obsolete, no longer maintained or supported by ARM, but still quite popular. Supports J-Link via RDI interface. J-Link RDI license required.

All information are collected to the best of our knowledge and belief. It may be subject to change and may be updated at any time. If you find any false or missing information, feel free to contact us at infosegger.com.

1 Prices are the standard US prices for commercial use without code size / time limit. The prices are meant for comparison purposes and may not be up-to-date. For the current price, as well as other options, like evaluation or light versions of the software, please refer to the official website of the software vendor. If you think one of the prices is not accurate enough, feel free to contact us at infosegger.com.

2 Requires emulator with trace support. May not be supported with all devices.

3 May not be supported with all devices. Only available on Cortex-M/A/R devices.

J-Link Media

SEGGER J-Link Flash Breakpoint Introduction

SEGGER J-Link Flash Introduction

Ultra high speed flash programming

VCOM Functionality

J-Link comes with built-in virtual COM port (VCOM) functionality. This means that in addition to the regular J-Link debug functionality, J-Link will also show up as a COM port in the device manager of the operating system.

As most modern computers do not expose a physical COM port anymore but many hardware setups still use UARTs for logging, diagnostics and application control, usually a separate COM to USB adapter is needed to use the COM functionality of the target hardware while debugging in parallel.

With J-Link, such an additional adapter is not required as J-Link provides this adaption functionality.

Availability

The VCOM functionality is available on the current hardware version of the following J-Link models:

J-Link models are shipped with VCOM functionality disabled. It can be enabled via the J-Link Configurator utility. For more information about how to enable VCOM on a J-Link, please refer to the J-Link user guide.

Technology

The J-Link VCOM functionality is implemented via SEGGER emUSB-Device, using the CDC-ACM class.
For more information, please refer to the emUSB-Device pages.

Pinout

SWD_Port_VCOM.png

* On some models like the J-Link ULTRA, these pins are reserved for firmware extension purposes. They can be left open or connected to GND in normal debug environment. Please do not assume them to be connected to GND inside J-Link. Please note that the pins used for UART Tx/Rx are shared with some target interface pins on the J-Link side. This means that VCOM functionality is not available when using target interfaces that make use of these pins. For more information, please refer to the J-Link user guide.

Model Overview

J-Link PRO

J-Link ULTRA+

J-Link PLUS

 J-Link PLUS Compact

J-Link BASE

J-Link BASE Compact

J-Link EDU

J-Link EDU Mini

J-Link FAQs

What is the advantage of J-Link versus simple probes such as FTDI based systems?

 A: J-Link has numerous advantages. One of the biggest advantages is the J-Link software supplied by SEGGER, which allows using it with common IDEs, the availability of unlimited flash breakpoints for people debugging software which runs in the flash of  microcontrollers, as well as the high speed of the J-Link and the simple and very fast download into flash memory. In contrast to most of the simple probes, it supports adaptive clocking as well as SWD and SWO. It also works more stable since it is not just a dump USB to JTAG converter, but uses the intelligence of the built-in CPU, providing a more robust communication, especially in situations where the target CPU runs at low clock speeds.

Is it possible to write my own application with J-Link?

A: Yes. We offer a dedicated Software Developer Kit (SDK). It allows using the full J-Link functionality. [More info...]

The core of my target system could not be recognized automatically. Is there a way to configure my device in order to communicate with J-Link?

A: Yes! In most cases the J-Link auto-detection works fine and recognizes the core of a device automatically. However, in some cases the auto-detection of J-Link does not work e.g. if the core is not present in the JTAG chain by default and needs to be enabled by sending a command to another device in the JTAG-chain. In such cases, the connection sequence of J-Link can be customized by using a J-Link script file which is executed before the communication between J-Link and the target system starts. The script file allows maximum flexibility, so almost any target initialization which is necessary can be supported.

What is adaptive clocking and when and why would I use it?

A: If the target provides the RTCK signal, select the adaptive clocking function to synchronize the JTAG clock (TCK) to the processor clock outside the core. This ensures there are no synchronization problems over the JTAG interface. If you use the adaptive clocking feature, transmission delays, gate delays, and synchronization requirements result in a lower maximum clock frequency than with nonadaptive clocking. This is the recommended JTAG speed used to connect to ARM7/9 -S cores.

I have multiple ARM cores in my JTAG chain. How can I debug them (simultaneously) with J-Link?

A: Simple: Two or more debuggers can use the same J-Link simultaneously. Multi-core debugging requires multiple debuggers or multiple instances of the same debugger. You need to tell your debugger which device in the scan chain you want to debug. Additional special settings are not required.

May I work with more than one J-Link at the same time on the same machine?

 A: Yes, you can connect an unlimited number of J-Links to your PC. No special configuration is required, since each J-Link is registered with its unique serial number at the PC, allowing it to have multiple J-Links connected in parallel.

Which CPUs are supported by J-Link?

A: J-Link works with ARM7/9/11, Cortex-A5/A8/A9, Cortex-M0/M0+/M1/M3/M4/M7, Cortex-R4/R5, Microchip PIC32 and Renesas RX100/RX200/RX600 series CPUs.

Here is a detailed list of supported CPUs and Devices.

What is the maximum JTAG speed supported by J-Link?

A: The maximum JTAG speed supported by J-Link BASE and J-Link PLUS is 15MHz. J-Link ULTRA+ and J-Link PRO support a maximum JTAG speed of 50MHz.

What is the maximum download speed into RAM?

A: The maximum download speed is currently about 1 MByte/s for J-Link BASE/PLUS and 3 MBytes/s for J-Link ULTRA+ and J-Link PRO when downloading into RAM. However, the actual speed depends on various factors, such as JTAG, clock speed, host CPU core etc.

Can J-Link read back the status of the JTAG pins?

A: Yes, the status of all pins can be read. This includes the outputs of J-Link as well as the supply voltage, which can be useful to detect hardware problems on the target system.

Does J-Link support the Embedded Trace Buffer (ETB)?

A: Yes. J-Link supports ETB on Cortex-M3/M4/M7 and Cortex-A9.

Does J-Link support the Micro Trace Buffer (MTB)?

A: Yes.

Does J-Link support the Embedded Trace Macrocell (ETM)?

A: No. ETM requires another connection to the ARM chip and a CPU with built-in ETM. ETM is supported by the J-Trace product family.