Supported CPUs and devices
Any microcontroller, MPU, SoC with a supported CPU core with its debug interface accessible is supported and can be fully controlled by J-Link.
Supported CPU cores
Arm China
- Star
Arm Cortex
Cortex-A/R 32-bit
- Cortex-A5
- Cortex-A7
- Cortex-A8
- Cortex-A9
- Cortex-A12
- Cortex-A15
- Cortex-A17
- Cortex-A32
- Cortex-R4
- Cortex-R5
- Cortex-R7
- Cortex-R8
- Cortex-R52
Cortex-A/R 64-bit
- Cortex-A35
- Cortex-A53
- Cortex-A55
- Cortex-A57
- Cortex-A72
Cortex-M
- Cortex-M0
- Cortex-M0+
- Cortex-M1
- Cortex-M3
- Cortex-M4
- Cortex-M7
- Cortex-M23
- Cortex-M33
- Cortex-M55
- Cortex-M85
Arm (legacy)
- ARM720T
- ARM7TDMI
- ARM7TDMI-S
- ARM920T
- ARM922T
- ARM926EJ-S
- ARM946E-S
- ARM966E-S
- ARM1136JF-S
- ARM1136J-S
- ARM1156T2-S
- ARM1156T2F-S
- ARM1176JZ-S
- ARM1176JZF
- ARM1176JZF-S
Cadence Tensilica
HiFi DSPs
- HiFi 1
- HiFi 3
- HiFi 3z
- HiFi 4
Fusion DSPs
- Fusion F1
Xtensa Processors
- Xtensa LX6
- Xtensa LX7
Microchip PIC
- Microchip PIC32MX
- Microchip PIC32MZ
- Microchip PIC32WK
Renesas RX
- Renesas RX110
- Renesas RX111
- Renesas RX113
- Renesas RX130
- Renesas RX13T
- Renesas RX140
- Renesas RX210
- Renesas RX21A
- Renesas RX220
- Renesas RX231
- Renesas RX23T
- Renesas RX24T
- Renesas RX610
- Renesas RX621
- Renesas RX62G
- Renesas RX62N
- Renesas RX62T
- Renesas RX630
- Renesas RX631
- Renesas RX63N
- Renesas RX63T
- Renesas RX64M
- Renesas RX65N
- Renesas RX651
- Renesas RX660
- Renesas RX66T
- Renesas RX71M
- Renesas RX72M
- Renesas RX72N
- Renesas RX72T
AndesTech (RISC-V)
RV32
- A25
- A25MP
- A27
- A27L2
- A45
- A45MP
- D25F
- D45
- N22
- N25
- N25F
- N45
RV64
- AX25
- AX25MP
- AX27
- AX27L2
- AX45
- AX45MP
- NX25F
- NX27V
- NX45
Codasip (RISC-V)
RV32
- L10
- L11
- L30
- L31
- L31F
- L30F
- L50
- L50F
RV64
- H50X
- H50XF
Nuclei Systems (RISC-V)
RV32
- N101
- N203
- N203E
- N205
- N208
- N305
- N307
- N308
- N605
- N607
- N608
- N900
- N900MP
RV64
- NX605
- NX607
- NX608
- NX900
- NX900MP
- UX605
- UX607
- UX608
- UX900
- UX900MP
SiFive (RISC-V)
RV32
- E20
- E21
- E24
- E31
- E34
- E61
- E61-MC
- E76
- E76-MC
RV64
- P270
- P550
- S21
- S51
- S54
- S61
- S61-MC
- S76
- S76-MC
- U54
- U54-MC
- U64
- U64-MC
- U74
- U74-MC
- X280
- X280-MC
Syntacore (RISC-V)
RV32
- SCR1
- SCR3-RV32
- SCR4-RV32
- SCR5-RV32
RV64
- SCR3-RV64
- SCR4-RV64
- SCR5-RV64
- SCR6-RV64
- SCR7-RV64
RISC-V misc.
RV32
- CAST BA51
- CloudBEAR BM-310
- NEORV32
RV64
- CloudBEAR BM-610
Silicon Labs 8051
- EFM8
Supported devices
A supported device that is also known by name is a called a “known” device. Knowing a device by name, in addition to knowing the CPU core, has following advantages:
- Ability to program internal flash (See Flash Download)
- Availability of unlimited number of breakpoints in flash memory (See Flash Breakpoints)
- A known memory map allows speed optimization for access to Flash and RAM
- Support for non-standard CPU-cores & bugs in silicon: Some silicon requires special sequences for unlock, reset, or for simply connecting to the core. For known devices, this is already implemented
Please note: J-Link can be used with any device that uses a standard core listed in the table of supported CPU cores. A device does not have to be known to be supported.
List of known devices
The following list gives an overview of which devices are known by J-Link:
This list is always valid for the latest version (highest version number) of the J-Link Software and Documentation Package. This may be a release (even version number) or beta version (odd version number), since support for some devices is usually added in a beta phase first.
Device not listed? Please feel free to contact us.
Adding support for new devices
If a device is not on the list of known devices on this page, there are two options to making it known by J-Link:
- Add support for it (incl. flash programming) on your own. For more information on how to do this, please refer to the SEGGER wiki.
- Get in touch with support@segger.com and issue a device support request.
Supported SPI flashes
J-Link also supports download into SPIFI (SPI Flash Interface) flashes if they are memory mapped readable through the CPU (called SPIFI support on most targets). Moreover, utilities like J-Flash SPI also support direct programming of SPI flashes without any CPU in between. The following SPI flashes are currently supported by the J-Link software: