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J-Link Control Panel Flash Download

J-Link Flash Download Technology breaks Speed Record

SEGGER's J-Link achieves a new speed record in programming flash memory. The new technology achieves a performance very close to the maximum speed possible while fully maintaining the highest standards in reliability. The SEGGER flash loaders include a verification of each block written and final checksum verification to guarantee proper operation.

This record has been achieved on an STM32F4 device, where J-Link programs 278 Kbytes/s, making it possible to program a 1MB device in less than 4 Seconds.

No other debug probe comes close to the performance of the J-Link. In a comparison test; the closest competitor took 4 times as long to program the same device.

The same technology works for all supported Cortex M microcontrollers, for internal and external flash. The exact speed achieved depends on the device.

It is very easy to take advantage of this great increase in speed when working with any of the supported IDEs. Simply using the latest SEGGER J Link software will supercharge the IDE. The software is available free of charge for existing J-Link users. On some IDEs it is necessary to upgrade to the fast SEGGER J Link flash loader rather than using the basic flash loader provided by the IDE vendor.

While debugging in flash memory of target hardware, the key variable in debugging speed is not the IDE but rather, the performance of the flash loaders and debug probe.

“A high flash download speed is very important both in production and during development. It demonstrates once again the leading position SEGGER has in this field. SEGGER's flash programming algorithm outperforms the competition by far, including much more expensive probes”, says Alexander Gruener, Product Manager for J-Link.

More details on the performance comparison can be found at:

www.segger.com/jlink-flash-download.html 

 

 

About J-Link

The SEGGER J-Link is the most popular debug probe on the market. It is tool chain independent and works with free GDB-based tool chains such as emIDE and Eclipse, as well as commercial IDEs from: Microchip (MPLAB® X), Atmel, Atollic, Coocox, Cosmic, Freescale, IAR, KEIL, Mentor Graphics, Python, Rowley, Renesas, Tasking and others. With the J-Link family, investments in the debug probe are preserved when changing compiler or even CPU architecture.

J-Link supports multiple CPU families, such as ARM 7, 9, 11, Cortex-M0, M0+, M1, M3, M4, R4, A5, A8, A9 as well as Renesas RX100, RX200, RX610, 620, 62N, 62T, 630, 631, 63N and Microchip PIC32; there is no need to buy a new J-Link or new license when switching to a different yet supported CPU family or tool-chain. SEGGER is also continuously adding support for additional cores, which in most cases, only requires a software/firmware update. Unlimited free updates are included with even the baseline model of the J-Link family. SEGGER is excited to continue advanced development of its cutting edge embedded tool solutions to be utilized with pretty much any development environment you choose. All J-Links are fully compatible to each other, so an upgrade from a lower-end model to a higher-end model is a matter of a simple plug-and-play.

Full product specifications are available at: www.segger.com/jlink.html The J-Link-Software is available at: www.segger.com/download_jlink.html U.S. On-Line Web Shop: http://shop-us.segger.com Online Shop (Europe, Asia, Africa): http://shop.segger.com

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2019
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