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ISO 9001 certified


M32C/M16C80, IAR

embOS for RENESAS M32C was developed for and with IAR's compiler and supports all memory models offered by this compiler.
embOS for M32C comes with easy to use start projects for M32C and M16C80 CPUs which may be used with IAR's embedded workbench. Software development with PD308 debugger, KD308(3) ROM-Monitor, CSpy ROM monitor driver and CSpy simulator and other debugging tools like E8a is supported.

 

Pricing Trial download Notification Subscribe to embOS software notification Release Notes

 

Resources and performance data

Memory usage
Kernel size (ROM) 1587 bytes
Kernel RAM usage 37 bytes
RAM usage per task control block 28 bytes
RAM usage per resource semaphore 6 bytes
RAM usage per counting semaphore 2 bytes
RAM usage per mailbox 18 bytes
RAM usage per software timer 14 bytes
RAM usage event 0 bytes
Min. stack-size per task (RAM) 64 bytes
Timing
Context switch time 289 clock cycles (9.6 µs), independent of number of tasks
Interrupt latency time Max. 181 clock cycles (7.5 µs) / 28 clocks for high priority interrupts
Kernel CPU usage/TICK Less than .3% of total calculation time at 1000 interrupts/second (1ms TICK)
Basic time unit (TICK) Typ. 1 ms, min. 10 µs (100 kHz interrupt frequency)
Features
Max. no. of tasks Unlimited (by available RAM only)
Max. no. of mailboxes Unlimited (by available RAM only)
Max. no. of semaphores Unlimited (by available RAM only)
Max. no. of software timers Unlimited (by available RAM only)
Max. no. of priorities 255
Stack size idle task (RAM) 0 (no memory needed)
Nested interrupts Permitted
Task switches from within ISR Possible

Absolute data given above were measured with embOS release build on an M30853 CPU running at 30MHz in HUGE memory model.

 

Board support packages

embOS comes with lots of ready to go start projects and support packages for various CPUs and starterboards.

CPU Eval board
Renesas M32C Renesas M32C evalboard
Renesas MC80 Renesas MC80 evalboard