embOS for Renesas M16C6x / M16C20 was developed for and with IAR's compiler V3.50F and supports all memory models offered by this compiler. It comes with an easy to use start project for IAR's embedded workbench. Software development with debugger, ROM-Monitor and CSpy simulator is supported.
A version for the older IAR compiler versions is available on request. Please refer to release notes below.
|Pricing||Trial download||Subscribe to embOS software notification||Release Notes|
Resources and performance data
|Kernel size (ROM)||1281 bytes|
|Kernel RAM usage||28 bytes|
|RAM usage per task control block||18 bytes|
|RAM usage per resource semaphore||4 bytes|
|RAM usage per counting semaphore||2 bytes|
|RAM usage per mailbox||12 bytes|
|RAM usage per software timer||12 bytes|
|RAM usage event||0 bytes|
|Min. stack-size per task (RAM)||42 bytes|
|Context switch time||346 clock cycles (21.6 µs), independent of number of tasks|
|Interrupt latency time||Max. 122 clock cycles (7.6 µs)|
|Kernel CPU usage/TICK||Less than .4% of total calculation time at 1000 interrupts/second (1ms TICK)|
|Basic time unit (TICK)||Typ. 1 ms, min. 20 µs (50 kHz interrupt frequency)|
|Max. no. of tasks||Unlimited (by available RAM only)|
|Max. no. of mailboxes||Unlimited (by available RAM only)|
|Max. no. of semaphores||Unlimited (by available RAM only)|
|Max. no. of software timers||Unlimited (by available RAM only)|
|Max. no. of priorities||255|
|Stack size idle task (RAM)||0 (no memory needed)|
|Task switches from within ISR||Possible|
Absolute timings given above were measured with embOS release build on an MB30624 CPU running at 16MHz in NEAR memory model.
Board support packages
embOS comes with lots of ready to go start projects and support packages for various M16C/R8C CPUs and starterboards.
|Renesas M16C62||MSC ModSDK-M16C-Base|
|Renesas M16C62P||MSC ModSDK-M16C-Base|
|Renesas R8C1B||MSC ModSDK-M16C-Base|