embOS-Base RISC-V GCC
embOS-Base RTOS port for RISC-V was developed for and with GCC for RISC-V and can be used on any RISC-V device.
Board support packages (BSPs) for different RISC-V devices and evaluation boards are included.
Resources and performance data
Memory usage | |
---|---|
Kernel ROM | Approx. 2000 Bytes |
Kernel RAM | 110 Bytes |
Task RAM: Task control block | 36 Bytes |
Task RAM: Minimum stack size | 64 Bytes |
Timing | |
Context switching time | 339 Cycles (3.7 µs with Lattice LFCPNX-100 running at 90 MHz) |
Interrupt latency time | Zero |
Board support packages
embOS-Base for RISC-V and GCC may be used on any RISC-V device. The most recent release includes the following board support packages (BSPs), but further board support packages may easily be created based on this release.
Do you want us to create the BSP on your behalf? Please contact us.
CPU | Evaluation board |
---|---|
Lattice LFCPNX-100 | Lattice CertusPRO-NX Versa |