What's Happening at SEGGER?

2014 |
Jul. 30
J-Link, Press Releases 2014
Real Time terminal with SEGGER J-Link

World’s first real time terminal with SEGGER J-Link

SEGGER announces J-Link Real Time Terminal (RTT) which speeds up bidirectional communication between the target system and the development computer by at least an order of magnitude. This new technology brings printf-style debugging and system verification functionality to any application. The only thing needed to use J-Link RTT is a CPU with a debug interface that allows background memory access; no extra pins are required.

J-Link RTT outputs messages to a host terminal without halting the target system. It takes less than a microsecond to output a typical one line text message on a Cortex-M or Renesas RX system. As this communication is bidirectional, values may also be passed in from the development computer to update the running target application.

J-Link RTT allows accurate multichannel communication in real time, using existing debug signals. The target implementation is written in ANSI C, and can be used alongside any IDE/Debugger using a simple Telnet application. It is also possible to override the standard printf() functions to take advantage of J-Link RTT. This reduces the time taken for a printf() via SWO by a factor of at least 100, and traditional breakpoint/semihosting type systems by a factor of 10000 or more.

J-Link RTT is faster than semihosting or SWO.

Debug information may now be gathered while the application is performing time critical, real time tasks. Gathering debug information no longer has to affect the behavior of the target system which compounds or even masks bugs.

“Until now, verbose communication needed an additional hardware interface which was significantly slower. J-Link RTT makes this task a lot easier and, in some cases, possible for the first time,” says Alexander Gruener, Product Manager of the SEGGER J-Link family of debug probes.

J-Link RTT will work with any current J-Link probe.

More information and source code download can be found here:

More information on J-Link is available at:


About J-Link

The SEGGER J-Link is the most popular debug probe on the market. It is tool chain independent and works with free GDB-based tool chains such as emIDE and Eclipse, as well as commercial IDEs from: Microchip (MPLAB® X), Atmel, Atollic, Coocox, Cosmic, Freescale, IAR, KEIL, Mentor Graphics, Python, Rowley, Renesas, Tasking and others. With the J-Link family, investments in the debug probe are preserved when changing compiler or even CPU architecture.

J-Link supports multiple CPU families, such as ARM 7, 9, 11, Cortex-M0, M0+, M1, M3, M4, R4, A5, A8, A9 as well as Renesas RX100, RX200, RX610, 620, 62N, 62T, 630, 631, 63N and Microchip PIC32; there is no need to buy a new J-Link or new license when switching to a different yet supported CPU family or tool-chain. SEGGER is also continuously adding support for additional cores, which in most cases, only requires a software/firmware update. Unlimited free updates are included with even the baseline model of the J-Link family. SEGGER is excited to continue advanced development of its cutting edge embedded tool solutions to be utilized with pretty much any development environment you choose. All J-Links are fully compatible to each other, so an upgrade from a lower-end model to a higher-end model is a matter of a simple plug-and-play.

Full product specifications are available at:

The J-Link-Software is available at:

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