emWin Display Drivers
A display driver supports a particular family of display controllers. The drivers can be configured by modifying their configuration files whereas the driver itself does not need to be modified. The configuration files contain all required information for the driver including how the hardware is accessed and how the controller(s) are connected to the display.
Systems with Direct Accessible Frame Buffer
Direct accessible frame buffer means the frame buffer is accessible directly via data- and address bus. For that case the driver GUIDRV_Lin could be used. This driver supports all display controllers with linear video memory accessible via direct interface. The driver does only manage the content of the video memory. It is independent of the register interface of the display controller and can be used for managing each linear mapped video memory.
Displays with Indirect Accessible Frame Buffer
Whereas the direct interface accesses the video memory directly by the address bus of the CPU, the indirect interface requires a more complex communication with the display controller to get access to the video memory. On LCD controller side that interface is often called "MPU" interface. It normally consists of a set of control- and data lines. on emWin side this requires a few simple communication routines. These are getting called for writing and reading operations to/from the LCD controller.
The following table lists the currently available run-time configurable drivers developed for the current interface of emWin:
|Display driver||Supported display controllers / Purpose||Supported bits/pixel|
|GUIDRV_BitPlains||This driver can be used for solutions without display controller. It manages separate bitplains for each color bit. Initially it has been developed to support a solution for an R32C/111 which drives a TFT display without display controller. It can be used for each solution which requires the color bits in separate plains.||1 - 8|
|GUIDRV_Lin||This driver supports every display controller with linear addressable video memory with a direct (full bus) interface. This means that the video RAM is directly addressable by the address lines of the CPU. The driver contains no controller specific code. So it can also be used for solutions without display controller which require a driver which only manages the video RAM.||1, 2, 4, 8, 16, 24, 32|
|GUIDRV_SPage||1, 2, 4|