embOS-MPU Cortex-M IAR
embOS for Cortex-M was developed for and with IAR EWARM and can be used with any Cortex-M device.
Board support packages for different Cortex-M devices and evaluation boards are included.
Resources and Performance Data
|Kernel ROM||Approx. 2300 Bytes|
|Kernel RAM||91 Bytes|
|Task RAM: Task control block||308 Bytes|
|Task RAM: Minimum stack size||96 Bytes|
|Context switching time||578 Cycles (3.4 µs with STM32F407 CPU running at 168 MHz)|
|Interrupt latency time||Zero|
Board support packages
embOS-MPU for Cortex-M and IAR EWARM may be used on any Cortex-M device. The most recent release includes the following board support packages, but further board support packages may easily be created based on this release.
Do you want us to create the BSP on your behalf? Just get in contact with us!
|Cortex-M||Any Cortex-M hardware|
|NXP (Freescale) K66FN2M0||SEGGER emPower eval board|
|SiliconLabs EZR32LG330||SiliconLabs EZR32LG330 Leopard Gecko starter kit|
|ST STM32F207||ST STM3220G‑EVAL|
|ST STM32F407||ST STM3240G‑EVAL|
|ST STM32L053||ST STM32L053‑DISCOVERY|
|ST STM32L462||Custom hardware|