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SEGGER Evaluation Software for embOS/IP Switch Board



SEGGER Evaluation Software

Included Components:

Download   embOS/IP SwitchBoard eval software for SEGGER Embedded Studio

Other Downloads


Download   embOS/IP Switch Board documentation

Download   embOS/IP Switch Board Schematic

Download   AN0020: Getting Started with SEGGER Eval Software

SEGGER Notifications

   to SEGGER Evaluation Software Notifications

Getting Started

Getting Started with SEGGER embOS/IP Switch Board

The embOS/IP Switch Board is intended to be mainly a demonstrator board for the Tail Tagging add-on of SEGGER's embedded IP stack emNet. Micrel/Microchip has developed switches which can expand one physical port into 1+n ports, supported by the so-called Tail Tagging mode. This enhancement allows to establish multiple physical external ports when only one physical Ethernet port is available on the CPU - by choosing another PHY.

The embOS/IP Switch Board provides a solid starting point for a project that requires multiple physical Ethernet ports by using SEGGER’s middleware products. SEGGER’s embOS real-time operating system is at the heart of the evaluation. Furthermore, an evaluation version of the TCP/IP stack emNet (including web server demo and UPnP) enables full evaluation of multi interface solutions.

The embOS/IP Switch Board also features a J-Link OB, an on-board version of SEGGER’s market-leading debug probe J-Link.

There are three Ethernet ports that can be accessed individually by software although they share the same host interface by using the emNet Tail Tagging add-on. Each of the Ethernet ports can have its own hardware address and identified by the network as individual host.

The embOS/IP Switch Board is powered by USB only. Current consumption drawn strongly depends on the application and connected Ethernet links. Idle consumption is approx. 140 mA.

SEGGER - embOS/IP SwitchBoard V2 BlockDiagram

Data Sheets

embOS/IP Switch Board

  • Micrel/Microchip KSZ8794CNX integrated 4-port 10/100 managed Ethernet switch with Gigabit RGMII/MII/RMII interface
  • 3 RJ45 Ethernet connectors
  • NXP Kinetis K66 MCU (MK66FN2M0VMD18)
  • On-board debug probe J-Link-OB with Drag & Drop (STM32F072, mini A/B-type connector)
  • USB device: High speed, B-type connector
  • LEDs: 2x BiColor red/green
  • No jumpers or solder jumpers
  • Rubber feet
  • Dimensions 80 mm x 60 mm

Microcontroller — Kinetis MK66FN2M0VMD18

  • 180 MHz ARM Cortex-M4 based core with DSP instructions and Single Precision Floating Point unit
  • 2 MB program flash memory, 256 KB RAM, 4 KB FlexRAM
  • Memory protection unit with multi-master protection
  • Ethernet controller with RMII interface to external PHY and hardware IEEE 1588 capability
  • USB high-/full-/low-speed On-the-Go with on-chip high speed transceiver

Switch main features

  • Layer 2 managed 4-port switch
  • 3 10/100 Mbps copper ports + 1 10/100/1000 Mbps uplink port
  • Internal biasing, on-chip termination
  • Enhanced power management features incl. Energy Efficient Ethernet (EEE), PME, WoL
  • Programmable rate limiting and priority ratio
  • Tagged and port-based VLAN
  • Port based security and ACL-rule based packet filtering technology
  • QoS priority with four queues
  • High-performance memory bandwidth and a shared memory-based switch fabric with non-blocking support