SEGGER Evaluation Software for RISC-V Digilent ARTY
The Arty A7-35T FPGA Development Board is an FPGA board, that can host a bitstream to become a RISC-V processor. The below examples are based on the SiFive E31 bitstreams, that are available as a test version from SiFive's web page.
Data Sheets
Digilent ARTY
- Xilinx Artix-7 XC7A35T-L1CSG324I FPGA
- On-chip analog-to-digital converter
- Programmable over JTAG and quad-SPI flash
- 256MB DDR3L with a 16-bit bus @ 667MHz
- 16MB quad-SPI flash
- 10/100 Mb/s Ethernet
- USB-UART bridge
- Four interfaces (32 I/O)
Xilinx Artix-35T FPGA
- 33,280 logic cells in 5200 slices (each slice contains four 6-input LUTs and 8 flip-flops)
- 1,800 Kbits of fast block RAM
- Five clock management tiles, each with a phaselocked loop (PLL)
- 90 DSP slices
- Internal clock speeds exceeding 450MHz
- On-chip analog-to-digital converter (XADC)
- Programmable over JTAG and Quad-SPI Flash