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embOS RISC-V Embedded Studio

embOS for RISC-V was developed for and with Embedded Studio for RISC-V and can be used with any RISC-V device.
Board support packages for different RISC-V devices and evaluation boards are included.

Resources and Performance Data

Memory usage
Kernel ROMApprox. 2000 Bytes
Kernel RAM67 Bytes
Task RAM: Task control block36 Bytes
Task RAM: Minimum stack size64 Bytes
Timing
Context switching time565 Cycles (8.7 µs with SiFive E31 Core IP FPGA running at 65 MHz)
Interrupt latency timeZero

Board support packages

CPUEvaluation board
SiFive E31 RISC-V Core IP FPGA Eval KitDigilent Artix-7 FPGA Dev Board
SimulatorSimulator project