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ISO 9001 certified

MSP430/430x, IAR

embOS for Texas Instruments MSP430 & MSP430x was developed for and with IAR's compiler V5.52A but can be used with V5.x or V6.x also. It supports nearly all memory models offered by the IAR compiler.
It comes with easy to use start workspaces and start projects for the IAR Embedded Workbench.
Software development with CSpy simulator or MSP430 Flash Emulation Tool using CSpy is supported.


Pricing Trial download Notification Subscribe to embOS software notification Release Notes


Resources and performance data

Memory usage
Kernel size (ROM) 1700 bytes
Kernel RAM usage 47 bytes
RAM usage per task control block 12 bytes
RAM usage per resource semaphore 8 bytes
RAM usage per counting semaphore 4 bytes
RAM usage per mailbox 14 bytes
RAM usage per software timer 12 bytes
RAM usage event 0 bytes
Min. stack-size per task (RAM) 28 bytes
Context switch time 201 clock cycles (201.0 µs), independent of number of tasks
Interrupt latency time Max. 162 clock cycles (162.0 µs)
Kernel CPU usage/TICK Less than 1% of total calculation time at 1000 interrupts/second (1ms TICK)
Basic time unit (TICK) Typ. 1 ms, min. 100 µs (10 kHz interrupt frequency)
Max. no. of tasks Unlimited (by available RAM only)
Max. no. of mailboxes Unlimited (by available RAM only)
Max. no. of semaphores Unlimited (by available RAM only)
Max. no. of software timers Unlimited (by available RAM only)
Max. no. of priorities 255
Stack size idle task (RAM) 0 (no memory needed)
Nested interrupts Permitted
Task switches from within ISR Possible

Absolute data given above were measured with embOS release build on an MSP430F5659 CPU running at 1.05 MHz.


Board support packages

embOS comes with lots of ready to go start projects and support packages for various MSP430/430x CPUs and starterboards.

CPU Eval board
TI MSP430F149 TI  MSP430F149 evalboard
TI MSP430FG4619 TI FG2 4804
TI XMS430F5438 TI MSP-TS430PZ100F54