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ISO 9001 certified


R32C, IAR

embOS for RENESAS R32C was developed for and with IAR's compiler and supports all memory models offered by this compiler.
embOS for R32C comes with an easy to use start project for an R32C CPU which may be used with IAR's Embedded Workbench.
Software development and debugging with E30A or E8a emulator using C-SPY as well as using the C-SPY simulator is supported.

 

Pricing Trial download Notification Subscribe to embOS software notification Release Notes

 

Resources and performance data

Memory usage
Kernel size (ROM) Approx. 1200 bytes
Kernel RAM usage 63 bytes
RAM usage per task control block 36 bytes
RAM usage per resource semaphore 16 bytes
RAM usage per counting semaphore 8 bytes
RAM usage per mailbox 24 bytes
RAM usage per software timer 20 bytes
RAM usage event 0 bytes
Min. stack-size per task (RAM) 64 bytes
Timing
Context switch time 438 clock cycles (9.1 µs), independent of number of tasks
Interrupt latency time Max. 186 clock cycles (3.9 µs)
Kernel CPU usage/TICK Less than .1% of total calculation time at 1000 interrupts/second (1ms TICK)
Basic time unit (TICK) Typ. 1 ms, min. 10 µs (100 kHz interrupt frequency)
Features
Max. no. of tasks Unlimited (by available RAM only)
Max. no. of mailboxes Unlimited (by available RAM only)
Max. no. of semaphores Unlimited (by available RAM only)
Max. no. of software timers Unlimited (by available RAM only)
Max. no. of priorities Unlimited
Stack size idle task (RAM) 0 (no memory needed)
Nested interrupts Permitted
Task switches from within ISR Possible

Absolute data given above were measured with embOS release build on an R32C CPU running at 48MHz in NEAR data memory model.

Board support packages

embOS comes with lots of ready to go start projects and support packages for various Renesas R32C CPUs and starterboards.

CPU Eval board
Renesas R32C (R5F64112) Renesas RSKR32C111