SEGGER Microcontroller - Embedded Software Solutions

Head office Germany

Phone: +49-2103-2878-0
Fax: +49-2103-2878-28
E-mail: info@segger.com
www.segger.com

US office

Phone: +1-978-874-0299
Fax: +1-978-874-0599
E-mail: info@segger-us.com
www.segger-us.com

Development Tools

J-Link

General info & FAQs

The number of IDEs supporting J-Link, its exceptional performance, and unlimited flash breakpoints have made J-Link the embedded developer's go to choice for ARM emulators.

Today J-Link is probably the most popular emulator for ARM cores.

Unlike many of our competitors, we do not charge for software updates. All CPU families supported by the J-Link software can be used without additional license.

For example, this means that switching from an ARM7 to a Cortex or a supported Renesas RX device can be done without cost.

The latest software can always be downloaded free of charge here!

J-Link features

Supported CPUs

J-Link works with any of the following CPU cores:

ARM7/9/11
Cortex-A5/A8/A9
Cortex-M0/M1/M3/M4
Cortex-R4
Renesas RX610, RX621, RX62N, RX62T, RX630, RX631, RX63N

Direct download into flash memory of most popular microcontrollers supported

J-Link can program the internal flash of almost all popular microcontrollers as well as external CFI compliant flashes. From a debugger perspective, the flash area can be treated just like RAM, so this great feature works with basically any debugger, including GDB. More info...

Supports unlimited breakpoints in flash memory

Say goodbye to hardware breakpoint limitations! The J-Link offers unlimited breakpoints while debugging in flash memory free of charge for evaluation. The evaluation period is not time limited. For commercial use a separate license is required. More info...

Supported by all major IDEs

All major IDE's have built-in direct support for J-Link. J-Link GDB Server is also available free of charge for use with GNU based solutions. More info...

Free software updates

As a legitimate owner of a SEGGER J-Link, you can always download the latest software free of charge. Though not planned and not likely, we reserve the right to change this policy. Note that older models may not be supported by newer versions of the software. Typically, we support older models with new software at least 3 years after end of life. More info...

Supports concurrent access to CPU by multiple applications

J-Link allows multiple applications to access a CPU at the same time. This has numerous applications. J-Link commander can be used in parallel to a debugger, a tool to communicate via DCC can be used in parallel to a debugger or a visualisation tool such as Micrium's u/C-Probe or SEGGER's kernel viewer embOSView. This feature is currently not available for Cortex A and R cores.

Crossplatform support (runs on Windows, Linux, Mac OS X)

The MAC and Linux versions are fully usable, but limited to the following components:
J-Link Commander, command line GDBServer, shared library (DLL-equivalent)

Intelligence in the emulator firmware

In contrast to other emulators (low-end FTDI-based emulators as well as some "high-end" emulators) J-Link has intelligence for different CPU cores in the emulator firmware. For most emulators, the CPU communication handling is completely done from the PC side while the emulator simply outputs some PC-generated sequences. This makes special handling for scenarios like "low-power" and "very slow CPU speed at very high debug interface speed" almost impossible to handle. With having an intelligent emulator firmware which is able to handle such cases by itself, makes J-Link more robust for these situations.

Software Developer Kit (SDK) available

For customers who want to build their own applications using J-Link and for IDE vendors who implement J-Link support for their IDE, SEGGER offers a J-Link SDK which comes with the J-Link DLL + API documentation + implementation samples. The SDK is available for Windows and Linux. More info...

Supports multiple target interfaces

J-Link comes with support for multiple target interfaces. Currently, the following target interfaces are supported:

JTAG
SWD

Most devices only support the JTAG interface. With the introduction of the ARM Cortex-M devices, the SWD debug interface has been introduced and the number of devices supporting SWD is growing. SWD is a low-pin-count (actually 2 pins are needed) alternative debug interface to JTAG.

Supports SWV/SWO

J-Link fully supports ARM's SWV/SWO feature which is available for most devices which support the SWD interface. SWO is a single pin output from the core which can be used to transfer terminal data (printf) as well as for data tracing (monitor variable read/write accesses).

Various target adapters available, including optical isolation adapter

There are several target interface connectors available on the market. To fit all needs, SEGGER offers various target interface adapters for J-Link including a optical isolation adapter for JTAG (J-Link JTAG Isolator) which is connected between the target hardware and J-Link to provide electrical isolation. This is essential when the development tools are not connected to the same ground as the application. More info...

J-Link software package components

J-Link Commander

J-Link Commander (JLink.exe) is a command line based utility that can be used for verifying proper functionality of J-Link as well as for simple analysis of the target system. It supports some simple commands, such as memory dump, halt, step, go etc. to verify the target connection.

J-Link GDB Server

J-Link GDB Server is an application acting as server for debuggers or IDEs communicating with the debug probe via TCP/IP using the GDB protocol. It allows using J-Link with GDB and the growing number of debuggers and IDEs that use the same protocol. More info...

J-Link TCP/IP Server

The J-Link TCP/IP Server is a small server application that allows using J-Link remotely via TCP/IP. More info...

J-Flash

J-Flash is a PC software running on Windows (Windows 2000 and later) systems, which enables you to program the internal and external flash of your microcontroller via J-Link. More info...

J-Link ARM RDI

The JLink-RDI software is an RDI interface for J-Link. It makes it possible to use J-Link with any RDI compliant debugger. More info...

J-Mem

J-Mem displays memory contents of ARM-systems and allows modifications of RAM and sfrs (Special function registers) while target is running. More info...

Flash programming

Unlimited Flash Breakpoints

The J-Link software comes with an additional feature, called Unlimited Flash Breakpoints. Unlimited Flash Breakpoints allow the user to set an unlimited number of breakpoints when debugging in flash memory, rather than just the 2/4/6 (depending on CPU core) hardware breakpoints. More info...

FAQs

Advantages of J-Link versus other probes

What is the advantage of J-Link versus simple probes such as FTDI based systems?

J-Link has numerous advantages. One of the biggest advantages is the J-Link software supplied by SEGGER, which allows using it with common IDEs, the availability of flash breakpoints for people debugging software which runs in the flash of microcontrollers, as well as the high speed of the J-Link and the simple and very fast download into flash memory.

In contrast to most of the simple probes, it supports adaptive clocking as well as SWD and SWO. It also works more stable since it is not just a dump USB to JTAG converter, but uses the intelligence of the built-in CPU, providing a more robust communication, especially in situations where the target CPU runs at low clock speeds.

Using J-Link in my application

Q:	I want to write my own application and use J-Link. Is this possible?
A:	Yes. We offer a dedicated Software Developer Kit (SDK). It allows using the full J-Link functionality. [More info...]

J-Link Script files

The core of my target system could not be recognized automatically. Is there a way to configure my device in order to communicate with J-Link?

Yes! In most cases the J-Link auto-detection works fine and recognizes the core of a device automatically. However, in some cases the auto-detection of J-Link does not work e.g. if the core is not present in the JTAG chain by default and needs to be enabled by sending a command to another device in the JTAG-chain. In such cases, the connection sequence of J-Link can be customized by using a J-Link script file which is executed before the communication between J-Link and the target system starts. The script file allows maximum flexibility, so almost any target initialization which is necessary, can be supported.

Adaptive clocking

What is adaptive clocking and when and why would I use it?

If the target provides the RTCK signal, select the adaptive clocking function to synchronize the JTAG clock (TCK) to the processor clock outside the core. This ensures there are no synchronization problems over the JTAG interface. If you use the adaptive clocking feature, transmission delays, gate delays, and synchronization requirements result in a lower maximum clock frequency than with nonadaptive clocking. This is the recommended JTAG speed used to connect to ARM7/9 -S cores.

Multi-core debugging

Q:	I have multiple ARM cores in my JTAG chain. How can I debug them (simultaneously) with J-Link?
A:	Simple: Two or more debuggers can use the same J-Link simultaneously. Multi-core debugging requires multiple debuggers or multiple instances of the same debugger. You need to tell your debugger which device in the scan chain you want to debug. Additional special settings are not required.

Using multiple J-Links

Q:	May I work with more than one J-Link at one time on the same machine?
A:	Yes, you can connect up to 4 J-Links to your PC. The only thing to do is, to give each J-Link a different USB address. By default, J-Link connects via USB-address 0.

Supported CPUs

Q:	Which CPUs are supported by J-Link?
A:	J-Link works with any ARM7/9/11, Cortex-A5/A8/A9, Cortex-M0/M1/M3/M4, Cortex-R4 and Renesas RX600 series CPU.

Maximum JTAG speed

Q:	What is the maximum JTAG speed supported by J-Link?
A:	The maximum JTAG speed supported by J-Link is 12MHz. J-Link Ultra supports a maximum JTAG speed of 25MHz.

Maximum download speed

Q:	What is the maximum download speed into RAM?
A:	The maximum download speed is currently about 720 KByte/sec for J-Link and 1440 KByte/sec for J-Link Ultra when downloading into RAM. However, the actual speed depends on various factors, such as JTAG, clock speed, host CPU core etc. Take a look at the performance comparison to see how fast J-Link works in relation to other emulators.

Read status of JTAG pins

Q:	Can J-Link read back the status of the JTAG pins?
A:	Yes, the status of all pins can be read. This includes the outputs of J-Link as well as the supply voltage, which can be useful to detect hardware problems on the target system.

J-Link support of ETB

Q:	Does J-Link support the Embedded Trace Buffer (ETB)?
A:	Yes. J-Link supports ETB. Most current ARM7 / ARM9 chips do not have ETB built-in.

J-Link support of ETM

Q:	Does J-Link support the Embedded Trace Macrocell (ETM)?
A:	No. ETM requires another connection to the ARM chip and a CPU with built-in ETM. Most current ARM7 / ARM9 chips do not have ETM built-in.