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New J-Link Xilinx Adapter available

The new J-Link Xilinx Adapter connects to the 14-pin 2 mm Xilinx JTAG connector providing debug access to FPGA based MCU cores like the ARM Cortex-A9 core in the Zynq devices.

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Debugging the dual-core NXP i.MX RT600 with the one and only SEGGER J-Link

How to maintain a debug session of two cores at the same time, with the same probe, in two different IDEs/debuggers with only the SEGGER J-Link?

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