The Embedded Experts

Release notes for embOS V5.10.2.0 for ARM7/9/Cortex-A/R and GCC

Tool chain used for build

Compiler: gcc version 8.2.1 20181213 (release) [gcc-8-branch revision 267074] (GNU Tools for Arm Embedded Processors 8-2018-q4-major)
Assembler: GNU assembler version 2.31.51 (arm-none-eabi) using BFD version (GNU Tools for Arm Embedded Processors 8-2018-q4-major) 2.31.51.20181213
Linker: GNU ld (GNU Tools for Arm Embedded Processors 8-2018-q4-major) 2.31.51.20181213
Librarian: GNU ar (GNU Tools for Arm Embedded Processors 8-2018-q4-major) 2.31.51.20181213

Version 5.10.2.0 [14. Sep 2020]

New Features

  1. Update to latest embOS generic sources V5.10.2.
  2. BSP for Avnet ZedBoard added.

Improvements

  1. Memory access permissions and execute-never flag can now be set with OS_ARM_MMU_AddTTEntries().
  2. The API function OS_ARM_MMU_Enable() now sets the ACTLR.SMP automatically bit for Cortex-A7 devices, as caches are not used at all if this bit is not set.
  3. The API function OS_ARM_GT_Start() does not write the counter frequency register (CNTFRQ) anymore to allow the user to set custom counter frequencies.

Program corrections

  1. The L2 cache routines were internally called with virtual memory addresses instead of physical memory addresses by mistake.
    The problem existed since embOS version 4.04a2 and is fixed with version 5.10.2.0.

Version 5.02 [27. Jun 2018]

New Features

  1. Update to latest embOS generic sources V5.02.
  2. BSP for Variscite iMX6U5 board added.

Version 4.32 [13. Feb 2017]

New Features

  1. Update to latest embOS generic sources V4.32.
  2. New cache API functions OS_ARM_DCAHE_Invalidate() and OS_ARM_ICAHE_Invalidate() added.

Version 4.22 [20. Jun 2016]

New Features

  1. Update to latest embOS generic sources V4.22.

Version 4.10b1 [07. Aug 2015]

Program corrections

  1. L2 cache interrupt disable removed.
    The L2 cache routines disabled interrupts which caused additional interrupt latency.
    Interrupt disabling in L2 cache routines is not necessary, therefore it is removed.
  2. L2 cache initialization fixed.
    The L2 cache was initialized with invalid configuration values for Renesas RZ.

Version 4.10b [18. Jun 2015]

New Features

  1. Update to latest embOS generic sources V4.10b.

Program corrections

  1. Renesas RZ interrupt handler corrected according to the Renesas erratas.

Version 4.04a2 [20. Feb 2015]

New Features

  1. THUMB/THUMB2 libraries added.

Version 4.04a1 [30. Jan 2015]

New Features

  1. Support for L2 cache added.

Version 4.04a [23. Jan 2015]

New Features

  1. Update to latest embOS generic sources.
  2. Start project for Renesas RSK+RZA1 added.
  3. Start project for Altera Cyclone V SoC added.
    embOS for ARM emIDE now comes with a start project for the Altera SoC Cortex-A9.
    The project is prepared for download into the SDRAM of an SOCrates eval-board.

Version 3.90 [06. Mar 2014]

New Features

  1. New embOS sources V3.90.
    All new features of the embOS version V3.90 are described in the generic embOS manual and release notes.
  2. Start project for ATMEL AT91SAM9260 added.
    embOS for ARM emIDE now comes with a start project for the ATMEL AT9260.
    The project is prepared for download into the SDRAM of an ATMEL AT91SAM9260-EK eval board.

Version 3.88h1 [03. Jan 2014]

Program corrections

  1. OS_EnterRegion() implemented as function. With high optimization level, the OS_EnterRegion() function macro might not be compiled correctly using the GNU compiler. This leds into malfunction. The problem is fixed by implemntation of an OS_EnterRegion() function.
  2. Start project for ATMEL AT91SAM7S256 corrected. In the release configuration, a wrong CPU was selected. The flash of the CPU was not programmed properly and the application crashed. The problem is fixed in version 8.88h1.

Version 3.88h [23. Dec 2013]

New Features

  1. Initial version.