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Renesas RSK+SH7203
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We have board support packages (BSPs) and complete projects available for various Renesas Eval boards.

Different software packages are available for different boards; the packages include some or all of the following components:

  • embOS - real time OS / RTOS
  • emWin - graphic software / GUI
  • emFile - file system with support for NAND-, NOR- flashes, SD, CF cards, IDE and more
  • emUSB - USB device stack with support for bulk, MSD, CDC, HID and more

Some packages are executable demos, which can not be modified; some packages are trial versions, which come with the software in a library and the application in source code form, as well as a project for the IDE that has been used. Trial versions can usually be recompiled easily in less than a minute if the required compiler and IDE is installed. The application program can be modified, allowing intensive tests of the software. emWin trial versions usually also contain a simulation environment which allows test and recompilation on a PC.

RSK+SH7203

Renesas RSK+SH7203 Eval board

 

Controller:

  • SH7203
CPU:
  • SH2A

Board main Features:
  • One reset switch
  • Three user-defined switches
  • USB Host and USB Device connector
  • 100 MBits/s Ethernet controller
  • Serial Sound Interface
  • 4 MB external Flash ROM
  • 16 MB external SDRAM
  • QVGA LCD Display

Processor main features:
  • Original Renesas Technology architecture
  • 32-bit internal data bus
  • Sixteen 32-bit general registers
  • Four 32-bit control registers
  • Four 32-bit system registers
  • Register banks for fast interrupt response
  • RISC-type instruction set (upward-compatible with SH Series)
  • Instruction length: 16-bit basic instructions for improved efficiency, and 32-bit instructions for improved performance and ease of use
  • Load-store architecture
  • Delayed branch instructions
  • Instruction set based on C language
  • Superscalar architecture allowing simultaneous execution of two instructions, including FPU
  • Instruction execution time: Max. 2 instructions/cycle
  • Address space: 4 Gbytes
  • On-chip multiplier
  • Five-stage pipeline
  • Harvard architecture

Segger Eval Software (emWin, embOS) for HEW4
(tested with V4.03)

embOS trial version for SH2A and HEW

 

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For more information, please visit our web site www.segger.com or contact us at info@segger.com
Last update: September 26, 2008