embOS STM8 for IAR compiler

embOS for the ST STM8 series was developed for and with the IAR Embedded Workbench for STM8.
It comes with a ready to go start project for an STM8 CPU.
Software development with the ST-Link debugger tool and CSpy or CSpy simulator is supported.

Resources and performance data

Memory usage
Kernel size (ROM)	approx. 1800 bytes
Kernel RAM usage	42 bytes
RAM usage per task control block	22 bytes
RAM usage per resource semaphore	7 bytes
RAM usage per counting semaphore	4 bytes
RAM usage per mailbox	11 bytes
RAM usage per software timer	9 bytes
RAM usage event	0 bytes
Min. stack-size per task (RAM)	32 bytes
Timing
Context switch time	23.0 usec
Interrupt latency time	zero
Kernel CPU usage/TICK	less than .2% of total calculation time at 1000 Interrupts/second (1ms TICK)
Basic time unit (TICK)	typ. 1 ms, min. 50 µs (20 kHz interrupt frequency)
Features
Max. no. of tasks	Unlimited (by available RAM only)
Max. no. of mailboxes	unlimited (by available RAM only)
Max. no. of semaphores (resource/binary/counting)	unlimited (by available RAM only)
Max. no. of software timers	unlimited (by available RAM only)
Max. no. of priorities	255
Stack size idle task (RAM)	0(no memory needed)
Nested interrupts	permitted
Task switches from within ISR	possible

Absolute values given above were measured with embOS release build on a CPU running at 16MHz.

embOSView offers system analysis during runtime

 

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Release notes embOS Version 3.82h for STM8 IAR

1. Tool chain used for build
2. Performance
3. New features
4. Improvements
5. Program corrections
6. Known problems
7. Release history
8. Miscellaneous

Tool chain used for build

The following tools have been used:

Compiler:  IAR ICCSTM8   1.10.0 (1.10.0.50013)
Assembler: IAR IASMSTM8  1.10.0 (1.10.0.50013)
Librarian: IAR IARCHIVE  9.3.2.10 (9.3.2.10)
Workbench: IAR IARIDEPM  6.0.2.1480 (6.0.2.1480)

Performance

1. Task switch time
   < 1.2us
2. Interrupt latency for Fast interrupt
   zero

New features

Version 3.82h

1. NONE, Initial release
   This initial release of embOS STM8 for IAR compiler is based on embOS sources 3.82h.

Improvements

Version 3.82h

1. NONE, Initial release
   This initial release of embOS STM8 for IAR compiler is based on embOS sources 3.82h.

Program corrections

Version 3.82h

1. NONE, Initial release
   This initial release of embOS STM8 for IAR compiler is based on embOS sources 3.82h.

Known problems / Limitations

Version 3.82h

1. Small data memory model not supported.
   The small data memory model per default allows a total amount of RAM of 256 bytes.
   As this is does not make much sense for usage with embOS, the small data memory is not supported.
2. Large data memory model not supported.
   The large data memory model is not supported by embOS because memory addressing above the 64KB address range ist not very efficient and normally not needed.

Release history

Version	Release date	Short explanation
V3.82h	19. Jul 2010	Initial release, based on embOS V3.82h

Miscellaneous

This document was first released with version 3.82h of the software.
Software released earlier is documented internally.
This information is available at request.