embOS for Infineon C16x CPUs was developed for and with KEIL compiler and supports all memory models, except TINY.

It comes with an easy to use start project for KEIL uVision2 IDE. Software development with Simulator and ROM-Monitor is supported.
Fast interrupts supported since embOS version 3.10p.

Resources and performance data

Memory usage
Kernel size (ROM)	1536 bytes
Kernel RAM usage	27 bytes
RAM usage per task control block	18 bytes
RAM usage per resource semaphore	4 bytes
RAM usage per counting semaphore	2 bytes
RAM usage per mailbox	12 bytes
RAM usage per software timer	10 bytes
RAM usage event	0 bytes
Min. stack-size per task (RAM)	32 bytes
Timing
Context switch time	1248 clock cycles (62.4 µs), independent of number of tasks
Interrupt latency time (Fast interrupt)	max. 16 clock cycles (0.8 µs)
Kernel CPU usage/TICK	less than .5% of total calculation time at 1000 Interrupts/second (1ms TICK)
Basic time unit (TICK)	typ. 1 ms, min. 20 µs (50 kHz interrupt frequency)
Features
Max. no. of tasks	Unlimited (by available RAM only)
Max. no. of mailboxes	unlimited (by available RAM only)
Max. no. of semaphores (resource/binary/counting)	unlimited (by available RAM only)
Max. no. of software timers	unlimited (by available RAM only)
Max. no. of priorities	255
Stack size idle task (RAM)	0(no memory needed)
Nested interrupts	permitted
Task switches from within ISR	possible

"Absolute data given above were measured with embOS release build on an C167 CPU running at 20MHz in SMALL memory model.

embOSView offers system analysis during runtime

---

Release notes

 

Updated: 2003-06-03 [TB] V3.10p
Updated: 2002-07-02 [AW] V3.10
Updated: 2002-06-25 [TB] V3.09

1. Tool chain used for build
2. Performance
3. New features
4. Improvements
5. Program corrections
6. Known problems/limitations
7. Release history
8. Miscellaneous

Tool chain used for build

The following tools have been used:

Compiler        :  C166 V4.27
Assembler       :  A166 V4.26
Librarian       :  LIB166 V4.28
Workbench       :  uVision2 V2.38a

Performance

1. Task switch time (SMALL memory model, Release build): 65.2 us = 1304 CPU clock cycles


2. Interrupt latency (SMALL memory model, Release build): 0.8 us = 16 CPU clock cycles

Absolute timings are based on 20MHz CPU clock and program execution in external FLASH

New features

Version 3.10p

1. Fast interrupts
   embOS does no longer disable interrupts except when modifying the user stack pointer. Instead ILVL is set to 7. Therefore any interrupt with level 8 or higher can still be processed. See also the CPU specific manual regarding details.

Version 3.10

1. OS_WaitSingleEvent()
   Unmasked events remain unchanged, when function returns.
2. OS_WaitSingleEventTimed()

Unmasked events remain unchanged, when function returns. Timeout for waiting can be specified.

Version 3.09

NONE

Improvements

Version 3.10p

1. Interrupt latency
   By supporting fast interrupts, the interrupt latency has been reduced to 3 instructions only.

Program corrections

Version 3.10p

1. embOSView NAT error
   Due to segmentation, it is possible, that e.g. pt!=p, although they both point to the same physical address. The problem occurs, if the compiler has to cast a physical address sent by embOSView to a segmented address and then compares it with another segmented address. In result it was possible, that embOSView reported a NAT (not a task) error and could not display the task list. The modificaion forces the compiler to compare physical address in such a case instead of comparing segmented address.
2. OS_GetMail
   Functions corrected (interrupts disabled before call of _GetMail)
3. OS_CreateTask
   The function now initializes profiling variables. (Required if TCB is used multiple)

Known problems / limitations

NONE

Release history

Version	Release date	Short explanation
V3.10p	03.Jun. 2003	New compiler and fast interrupts
V3.10	02.Jul. 2002	Two event functions added
V3.09	25.Jun. 2002	First release for C166/C167 using Keil compiler

Miscellaneous

This document was first released with version 3.09 of the software.