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ARM Instruction ADD

Add

ADD

Thumb syntax (narrow, v4T)

ADDRd, RnSee [1]
ADDSP, SP, #0508See [2]
ADDRd, SP, #01020See [3]
ADDRd, PC, #01020See [3]
ADDSRd, Rn, RmSee [4]
ADDSRd, #0255See [5]
ADDSRd, Rn, #07See [6]

Thumb syntax (wide, v6T2)

ADDRd, Rn, #04095
ADDRd, Rn, #constSee [7]
ADDRd, Rn, Rm, shiftSee [8]
ADDSRd, Rn, #constSee [9]
ADDSRd, Rn, Rm, shiftSee [8]

Arm syntax (v4T)

ADDRd, Rn, #constSee [10]
ADDRd, Rn, Rm, shiftSee [11]
ADDRd, SP, Rm, shiftSee [12]
ADDSRd, Rn, #constSee [10]
ADDSRd, Rn, Rm, shiftSee [11]
ADDSRd, SP, Rm, shiftSee [12]

Notes

  1. ordering Rd, Rn, Rd is also permitted
  2. offset a multiple of 4
  3. Rd must be R0…R7; offset a multiple of 4
  4. Rd, Rn, Rm must be R0…R7
  5. Rd must be R0…R7
  6. Rd, Rn must be R0…R7
  7. Rd, RnPC; Rd, RnSP; const is one of $00xx00xx, $xx00xx00, $xxxxxxxx, $xx LSL 024
  8. RmPC; RmSP; shift is one of LSL #031, LSR #132, ASR #132, RRX
  9. RdPC; const is one of $00xx00xx, $xx00xx00, $xxxxxxxx, $xx LSL 024
  10. const is $xx ROR 2n
  11. Rd, RmPC; Rd, RmSP; shift is one of LSL #031/Rs, LSR #132/Rs, ASR #132/Rs, ROR #131/Rs, RRX
  12. Rd, RmPC; RmSP; shift is one of LSL #031/Rs, LSR #132/Rs, ASR #132/Rs, ROR #131/Rs, RRX