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ISO 9001 certified

RH850, IAR

embOS for Renesas RH850 was developed for and with IAR compiler and supports the small, medium and large data models offered by this compiler. It comes with easy to use start projects for IAR's embedded workbench. Software development is possible with the C-SPY simulator or with the C-SPY debugger and JTAG tools like Renesas E1.


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Resources and performance data

Memory usage
Kernel size (ROM) Approx. 2000 bytes
Kernel RAM usage 67 bytes
RAM usage per task control block 32 bytes
RAM usage per resource semaphore 16 bytes
RAM usage per counting semaphore 8 bytes
RAM usage per mailbox 24 bytes
RAM usage per software timer 20 bytes
RAM usage event 0 bytes
Min. stack-size per task (RAM) 56 bytes
Context switch time 2.3 µs
Interrupt latency time 0.5 µs
Kernel CPU usage/TICK Less than .2% of total calculation time at 1000 interrupts/second (1ms TICK)
Basic time unit (TICK) Typ. 1 ms, min. 10 µs (100 kHz interrupt frequency)
Max. no. of tasks Unlimited (by available RAM only)
Max. no. of mailboxes Unlimited (by available RAM only)
Max. no. of semaphores (resource/binary/counting) Unlimited (by available RAM only)
Max. no. of software timers Unlimited (by available RAM only)
Max. no. of priorities Unlimited
Stack size idle task (RAM) 0 (no memory needed)
Nested interrupts Permitted
Task switches from within ISR Possible

Absolute values given above were measured with embOS XRelease build on an RH850\F1L running at 80MHz with small data model.

Board support packages

embOS comes ready to go start projects and support packages for the RH850 microcontroller.

CPU Eval board  
R7F7010573 Renesas RH850\F1L Starter Kit V2