Readme.txt for sample project for CPU V850E_IA1

This project was built for the IAR Workbench for V850 V3.71

It has been tested with the following versions:
- V3.71.1
- V3.80.1


Supported hardware:
===================
The sample project is prepared
to run on any hardware with the selected CPU,
or can be used with the CSpy simulator

Using the UART for communication to embOSView may
require modifications.

Configurations
==============
- ICE_DP:
  This configuration is prepared for download into
  the target CPU using a debugger probe and CSpy.
  An embOS debug and profiling library is used.

- TARGET_SP:
  This configuration is prepared to generate a motorola
  output fil which may be downloaded into the target using a Flash programmer.
  It uses an embSO stack check an profiling library.

- SIM_DP:
  This configuration is prepared to be used
  with the CSpy simulator.
  The embOS timer interrupt is simulated by a CSpy macro file.
  An embOS debug and profiling library is used.
