ReadMe.txt for the Freedom E31 Coreplex IP start project.

This project was built for IAR Embedded Workbench for RISC-V 3.10.1.

Supported hardware:
===================
The sample project for the Freedom E31 Coreplex IP is prepared to
run on a Digilent Arty FPGA Dev Kit. Using different target hardware
may require modifications.

Configurations:
===============
- Debug:
  This configuration is prepared for download into internal
  Flash using I-Jet. An embOS debug and profiling library
  is used.

- Release:
  This configuration is prepared for download into internal
  Flash using I-Jet. An embOS release library is used.
