ReadMe.txt for the Xilinx XC7Z007S start project.

This project was built for Segger Embedded Studio V7.10a.

Supported hardware:
===================
The sample project for the XC7Z007S is prepared to run on
a SEGGER emPower Zynq board. Using different target
hardware may require modifications.

Configurations:
===============
- Debug:
  This configuration is prepared for download into external
  flash using J-Link. An embOS debug and profiling library
  To use SEGGER SystemView with this configuration, configure
  SystemView for XC7Z007S as target device and JTAG as target
  interface. In addition, the RTT buffer address must be
  specified with this target (in case of doubt, search for
  _SEGGER_RTT in the respective map file).

- Release:
  This configuration is prepared for download into external
  flash using J-Link. An embOS release library is used.
