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We have board support packages (BSPs) and complete projects
available for various ST Eval boards.
Different software packages are available for different
boards; the packages include some or all of the following components:
- embOS - real time OS / RTOS
- emWin - graphic software / GUI
- emFile - file system with support for NAND-, NOR- flashes, SD, CF
cards, IDE and more
- emUSB - USB device stack with support for bulk, MSD, CDC, HID and
more
Some packages are executable demos, which can not be modified; some packages are trial versions, which come with the software
in a library and the application in source code form, as well as a project
for the IDE that has been used. Trial versions can usually be recompiled
easily in less than a minute if the required compiler and IDE is installed.
The application program can be modified, allowing intensive tests of the
software. emWin trial versions usually also contain a simulation environment
which allows test and recompilation on a PC.
STM32-SK IAR
STM32-SK IAR Eval board
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Controller:
CPU:
Board main Features:
- 16-character per line LCD display, two lines, 5x7 char
- Up to 16 User LEDs (depending on hardware configuration)
- Status LED
- Power-supply LED
- Three user-defined push buttons
- One Wake-up button
- Reset Button
- One Potentiometer (AN-TR)
- One SD card holder
- Two RS-232 ports
- One CAN port
- One USB device port
- Two RS232 connectors
- I2C routed to header pins
- I2S routed to header pins
- SPI routed to header pins
- Debug and programming support via 20-pin JTAG connector
- Powered via 400 mA supplied from J-Link-ARM-KS pin 19 or from external power, jumper selectable
- SD/MMC Card socket
- Prototype area
- Microphone jac
- Headphone jac
- RoHS compliant
Processor main features:
- Implements the ARM architecture v7-M
- Thumb-2 instruction set (Enhanced levels of performance, energy efficiency, code density, mixed mode capability, ARM levels of performance with Thumb level code density)
- Memory Protection Unit (MPU)
- Embedded Trace Macrocell(ETM)
- Data Watchpoint and Trace unit (DWT)
- Flash Patch and Breakpoint unit (FPB)
- Debug Port (SW-DP or SWJ-DP)
- Single cycle multiply and hardware divide instructions
- Preconfigured memory map
- Up to 4 gigabytes of addressable memory space
- Predefined addresses for code, memory, external devices, peripherals
- Dedicated space for vendor specific addressability
- Atomic bit manipulation with bit banding (Direct access to single bits of data)
- Unaligned data storage and access
- Integrated sleep modes (Sleep Now, Sleep on Exit)
Available software:
embOS trial version IAR
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