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LPC2148-SK IAR
| Analog Devices |Atmel |Freescale |LuminaryMicro |Microchip |NEC |NXP |Oki |Renesas |Sharp |ST Microelectronics |Texas Instruments |Toshiba |

We have board support packages (BSPs) and complete projects available for various NXP Eval boards.

Different software packages are available for different boards; the packages include some or all of the following components:

  • embOS - real time OS / RTOS
  • emWin - graphic software / GUI
  • emFile - file system with support for NAND-, NOR- flashes, SD, CF cards, IDE and more
  • emUSB - USB device stack with support for bulk, MSD, CDC, HID and more

Some packages are executable demos, which can not be modified; some packages are trial versions, which come with the software in a library and the application in source code form, as well as a project for the IDE that has been used. Trial versions can usually be recompiled easily in less than a minute if the required compiler and IDE is installed. The application program can be modified, allowing intensive tests of the software. emWin trial versions usually also contain a simulation environment which allows test and recompilation on a PC.

LPC2148-SK IAR

LPC2148 IAR Eval board

 

Controller:
  • LPC2148FBD64 (NXP)
CPU:
  • ARM7TDMI-S

Board main features:
  • Audio circuit wth microphone jack and headphone jack
  • Trace (MICTOR) connector mounted
  • Two UARTs with drivers and DB9 connectors
  • USB connector
  • ETM routing
  • Potentiometer connected to the ADC
  • Two buttons
  • One LED
  • 2 x 16 LCD
  • 20-pin JTAG interface connector
  • SD connector for external memory
  • 13x36 thru hole prototyping area
  • Ready to run code example exercising on-chip peripherals
  • Complete API for LCD
  • Schematics included
  • RoHS compliant

Processor main features:
  • 32/16-bit RISC architecture (ARM v4T)
  • 32-bit ARM instruction set for maximum performance and flexibility
  • 16-bit Thumb instruction set for increased code density
  • Unified bus interface, 32-bit data bus carries both instructions and data
  • Three-stage pipeline
  • 32-bit ALU
  • Small die size and low power consumption
  • Coprocessor interface
  • Extensive debug facilities:
    • EmbeddedICE-RT real-time debug unit
    • JTAG interface unit
    • Interface for direct connection to Embedded Trace Macrocell(ETM)

Available software:
embOS trial version IAR