This driver, like LCDMem, is designed for a system without an LCD controller. The difference is that LCDMemC supports color displays. For more information on using the CPU instead of an LCD controller, please see the previous section on the LCDMem driver.

Supported hardware

Controllers

None.

Bits per pixel

Supported color depths are 3 and 6 bpp.

Interfaces

The driver supports 1/4/8-bit interfaces from the CPU to the LCD.

Display data RAM organization

This driver supports a 3 or 6 bpp memory area for color displays. The picture above shows the dependence between the memory area handled by the driver and the SEG and COM lines of the LCD.

6 bits per pixel, fixed palette mode 222

When using the 6 bpp mode, the display memory is divided into 2 panes. The lower bit for each color is stored in pane 0 and the higher bit is stored in pane 1. The advantage of this method is that the output of the display data can be executed very quickly.

3 bits per pixel, fixed palette mode 111

When using this mode, only one pane exists.

RAM requirements of the driver

The driver only handles a memory area containing the display data. The required size of the display memory area may be calculated as follows:

6 bits per pixel, fixed palette mode 222

Size of RAM (in bytes) = (LCD_XSIZE + 7) / 8 * 3 * 2

3 bits per pixel, fixed palette mode 111

Size of RAM (in bytes) = (LCD_XSIZE + 7) / 8 * 3

Additional driver functions

None.

Hardware configuration

Normally, the hardware interface is an interrupt service routine (ISR) which updates the LCD. An output routine written in "C" code is shipped with emWin. This routine should serve only as an example. To optimize the execution speed, it must be adapted in assembler code.

For detailed information on how to write the output routine, please take a look at the sample or contact us.

Additional configuration switches