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emWin: LCD07X1 driver

Supported hardware

Controllers

This driver has been tested with the following LCD controllers

  • Samsung KSO711(S6B0711)
  • Samsung KSO741(S6B0741)
  • Solomon SSD1854

It should be assumed that it will also work with any controller of similar organization.

Bits per pixel

Supported color depth is 2 bpp.

Interfaces

The chip supports three types of interfaces:

  • 8-bit parallel (simple bus) interface)
  • 4-pin S PI.
  • 3-pin S PI.

The current version of the driver supports the 8-bit parallel (simple bus) or 4-pin SPI interface.

Display data RAM organization

The picture above shows the relation between the display memory and the SEG and COM lines of the LCD. The display memory is divided into two panes for each pixel. The lower bit of one pixel is stored in pane 0 and the higher bit is stored in pane 1.

Additional RAM requirements of the driver

This LCD driver may be used with or without a display data cache, containing a complete copy of the contents of the LCD data RAM. If a cache is not used, there are no additional RAM requirements.
It is recommended to use this driver with a data cache for faster LCD-access. The amount of memory used by the cache may be calculated as follows:
Size of RAM (in bytes) = (LCD_YSIZE + 7) / 8 * LCD_XSIZE * 2

Additional driver functions

LCD_L0_ControlCache

Hardware configuration

This driver accesses the hardware with a simple bus interface. The following table lists the macros which must be defined for hardware access:

Parallel mode

Macro Explanation
LCD_INIT_CONTROLLER Initialization sequence for the LCD controller.
LCD_READ_A0 Read a byte from LCD controller with A-line low. (Used only if working without cache)
LCD_READ_A1 Read a byte from LCD controller with A-line high. (Used only if working without cache)
LCD_WRITE_A0 Write a byte to LCD controller with A-line low.
LCD_WRITE_A1 Write a byte to LCD controller with A-line high.
LCD_WRITEM_A1 Write multiple bytes to LCD controller with A-line high.

Display orientation

The supported display controllers supports hardware mirroring of x/y axis. It is rec- comended to use these functions instead of the display orientation macros of emWin. If mirroring of the X axis is needed, the command 0xA1 (ADC select reverse) should be used in the initialization macro. This causes the display controller to reverse the assignment of column address to segment output. If the display size in X is smaller than the number of segment outputs of the display controller, the macro LCD_FIRSTSEG0 can be used to add an offset to the column address to make sure, the right RAM address of the LCD controller is accessed.
If mirroring of the Y axis is needed the command 0xC8 (SHL select revers) should be used in the initialization macro and the macro LCD_FIRSTCOM0 should be used to define the offset needed to access the right RAM address of the display controller.

Additional configuration switches

Macro Explanation
LCD_FIRSTCOM0 This macro can be used to define the first common address to be used
LCD_FIRSTSEG0 This macro can be used to define the first segment address to be used in the data RAM of the display controller. The value can be determined experimentally or taken from the display documentation.

Special requirements for certain LCD controllers

None.

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Last update: December 7, 2007