emWin: LCD8822 driver

Supported hardware

Controllers

This driver has been tested with the following LCD controllers

Raio RA8822

Bits per pixel

Supported color depth is 2 bpp.

Interfaces

The driver supports 8-bit parallel (simple bus) interface.

Display data RAM organization

The picture above shows the relation between the display memory and the SEG and COM lines of the display.

Additional RAM requirements of the driver

This LCD driver may be used with or without a display data cache, containing a com- plete copy of the contents of the LCD data RAM. If a cache is not used, there are no additional RAM requirements. It is recommended to use this driver with a data cache for faster LCD-access. The amount of memory used by the cache may be calculated as follows:

Size of RAM (in bytes) = (LCD_XSIZE + 7) / 8 * LCD_YSIZE * 2

Additional driver functions

None.

Hardware configuration

This driver accesses the hardware with a simple bus interface. The following table lists the macros which must be defined for hardware access:

Macro	Explanation
LCD_INIT_CONTROLLER	Initialization sequence for the LCD controller.
LCD_READ_A1	Read a byte from LCD controller with A-line high.
LCD_WRITE_A0	Write a byte to LCD controller with A-line low.
LCD_WRITE_A1	Write a byte to LCD controller with A-line high.
LCD_WRITEM_A1	Write multiple bytes to display controller with A-line high.

Additional configuration switches

The following table shows optional configuration switches available for this driver:

Macro	Explanation
LCD_CACHE	LCD_CACHE When set to 0, no display data cache is used, which slows down the speed of the driver. Default is 1 (cache activated).

Special requirements

None.