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emWin: LCD13701 driver

Supported hardware

Controllers

This driver has been tested with the following display controller:

# LCD controller
13800 Epson S1D13701 OLED controller

Bits per pixel

Supported color depth is 9 and 12 bpp.

Interfaces

16-bit parallel (simple bus) bus interfaces is supported.

Display data RAM organization

The picture above shows the relation between the display memory and the SEG and COM lines of the display..

Additional RAM requirements of the driver

This driver can be used with or without a display data cache. The data cache contains a complete copy of the contents of the display data RAM. If a cache is not used, there are no additional RAM requirements. It is recommended to use this driver with a data cache for faster display RAM access. Not using a cache degrades the performance of this driver. The amount of memory used by the cache can be calculated as follows:
Size of RAM (in bytes) = (LCD_XSIZE * LCD_BITSPERPIXEL / 16) * LCD_YSIZE * 2

Additional driver functions

None

Hardware configuration

This driver accesses the hardware with a simple bus interface. The following table lists the macros which must be defined for hardware access:

Macro Explanation
LCD_INIT_CONTROLLER Initialization sequence for the display controller.
LCD_READ_A1 Read a word from display controller with A-line high.
LCD_WRITE_A0 Write a word to display controller with A-line low.
LCD_WRITE_A1 Write a word to display controller with A-line high.
LCD_WRITEM_A1 Write multiple words to display controller with A-line high.

Additional configuration switches

Macro Explanation
LCD_CACHE LCD_CACHE When set to 0, no display data cache is used, which slows down the speed of the driver. Default is 1 (cache activated).

Special requirements for certain LCD controllers

None.

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Last update: December 7, 2007