embOS for Cortex A8 was developed for and with GNU compiler version 4.32 and supports all memory models offered by these compilers. It comes with easy to use start projects for Lauterbach's TRACE32 workbench. Initilization code for different Cortex A8 starter boards is included.

Resources and performance data

Memory usage
Kernel size (ROM)	approx. 1700 bytes
Kernel RAM usage	51 bytes
RAM usage per task control block	32 bytes
RAM usage per resource semaphore	8 bytes
RAM usage per counting semaphore	2 bytes
RAM usage per mailbox	20 bytes
RAM usage per software timer	20 bytes
RAM usage event	0 bytes
Min. stack-size per task (RAM)	72 bytes
Timing
Context switch time	TBD
Interrupt latency time	zero
Kernel CPU usage/TICK	less than .2% of total calculation time at 1000 Interrupts/second (1ms TICK)
Basic time unit (TICK)	typ. 1 ms, min. 20 µs (50 kHz interrupt frequency)
Features
Max. no. of tasks	Unlimited (by available RAM only)
Max. no. of mailboxes	unlimited (by available RAM only)
Max. no. of semaphores (resource/binary/counting)	unlimited (by available RAM only)
Max. no. of software timers	unlimited (by available RAM only)
Max. no. of priorities	64
Stack size idle task (RAM)	0(no memory needed)
Nested interrupts	permitted
Task switches from within ISR	possible

Absolute values given above were measured with embOS release build on an TI OMAP3503 CPU running at 600MHz.

embOSView offers system analysis during runtime

Additional information

GCC Compiler Web site for additional compiler info / support

Board support packages

embOS comes with lots of ready to go start projects and support packages for various Cortex A8 CPUs and starterboards.

CPU	Eval board
TI OMAP3503	Mistral OMAP3503 EVM

 

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Release notes embOS CA8 for GNU tools

1. Tool chain used for build
2. New features
3. Improvements
4. Program corrections
5. Known problems/limitations
6. Release history
7. Miscellaneous

Tool chain used for build

The following tools have been used:

Compiler:  arm-none-eabi-gcc V4.3.2
Assembler: arm-none-eabi-as  V2.18.50
Librarian: arm-none-eabi-ld  V2.18.50

New features

Version 3.80d

1. SDRAM support
   embOS for Cortex A8 runs now in external SDRAM

Version 3.80b3

1. MMU support
   embOS for Cortex A8 now supports the MMU.

Version 3.80b2

1. Uart and PLL initialization.
   embOS for Cortex A8 now supports the Uart und PLL.

Version 3.80b1

1. Thumb2 mode added.
   embOS for Cortex A8 now supports also the thumb2 mode.

Version 3.80b

1. NEON coprocessor support added.

Version 3.80

1. Initial version for Cortex A8

Improvements

Version 3.80e

1. Cache module updated.
   The cache modul was reviewed and updated.

Version 3.80

1. NONE, initial version for Cortex A8.

Program corrections

Version 3.80e

1. Neon support corrected.
   The Neon coprocessor register d16-d31 were not saved and restored correctly.

Version 3.80d1

1. Neon support corrected.
   The Neon coprocessor register were not saved and restored correctly.

Version 3.80b5

1. Missing batch file added.
   The batch file asm_cpu.bat was missing in embOS source version.

Version 3.80b4

1. Uart issue solved
   The uart rx interrupt service routine used the wrong uart interrupt.

Known problems/limitations

Version 3.80

1. NONE.

Release history

V3.80e	27. May 2009	Neon support corrected. Cache Module updated.
V3.80d1	08. May 2009	Neon support corrected.
V3.80d	23. April 2009	SDRAM support added.
V3.80b5	21. April 2009	Missing batch file added.
V3.80b4	16. April 2009	Uart issue solved.
V3.80b3	31. Mar 2009	MMU support added.
V3.80b2	25. Mar 2009	Uart and PLL added.
V3.80b1	03. Mar 2009	Thumb2 mode added.
V3.80b	13. Feb 2009	Support for NEON coprocessor.
V3.80	12. Feb 2009	Initial version for Cortex A8

Miscellaneous

This document was first released with version 3.80 of the software.
Software released earlier is documented internally. This information is available at request.