embOS for NEC V850 / V850E / V850ES CPUs and IAR compiler

embOS for NEC V850 was developed for and with IAR compiler and supports all memory models offered by this compiler. It comes with easy to use start projects for IAR's embedded workbench, prepared for different NEC V850 and V850E(S) CPU variants. Software development with debugger and simulator is supported.

Resources and performance data

Memory usage
Kernel size (ROM)	1728 bytes
Kernel RAM usage	41 bytes
RAM usage per task control block	32 bytes
RAM usage per resource semaphore	8 bytes
RAM usage per counting semaphore	2 bytes
RAM usage per mailbox	20 bytes
RAM usage per software timer	20 bytes
RAM usage event	0 bytes
Min. stack-size per task (RAM)	160 bytes
Timing
Context switch time	224 clock cycles (7 µs), independent of number of tasks
Interrupt latency time	max. 64 clock cycles (2 µs)
Kernel CPU usage/TICK	less than .15% of total calculation time at 1000 Interrupts/second (1ms TICK)
Basic time unit (TICK)	typ. 1 ms, min. 10 µs (100 kHz interrupt frequency)
Features
Max. no. of tasks	Unlimited (by available RAM only)
Max. no. of mailboxes	unlimited (by available RAM only)
Max. no. of semaphores (resource/binary/counting)	unlimited (by available RAM only)
Max. no. of software timers	unlimited (by available RAM only)
Max. no. of priorities	256
Stack size idle task (RAM)	0(no memory needed)
Nested interrupts	permitted
Task switches from within ISR	possible

Absolute timings given above were measured with embOS release build on an V850EMS1 CPU running at 32MHz with Tiny memory model .

embOSView offers system analysis during runtime

embOSView with V850EMS1 CPU

Available Emulators

Additional information

Release Notes embOS V850 for IAR compiler
IAR Web site for additional compiler info / support