embOS for RENESAS R32C and IAR compiler

embOS for RENESAS R32C was developed for and with IAR's compiler and supports all memory models offered by this compiler.
embOS for R32C comes with an easy to use start project for an R32C CPU which may be used with IAR's Embedded Workbench.
Software development and debugging with E30A emulator using C-SPY as well as using the C-SPY simulator is supported.

Resources and performance data

Memory usage
Kernel size (ROM)	approx. 1200 bytes
Kernel RAM usage	63 bytes
RAM usage per task control block	36 bytes
RAM usage per resource semaphore	16 bytes
RAM usage per counting semaphore	8 bytes
RAM usage per mailbox	24 bytes
RAM usage per software timer	20 bytes
RAM usage event	0 bytes
Min. stack-size per task (RAM)	64 bytes
Timing
Context switch time	438 clock cycles (9.1 µs), independent of number of tasks
Interrupt latency time	max. 186 clock cycles (3.9 µs)
Kernel CPU usage/TICK	less than .1% of total calculation time at 1000 Interrupts/second (1ms TICK)
Basic time unit (TICK)	typ. 1 ms, min. 10 µs (100 kHz interrupt frequency)
Features
Max. no. of tasks	Unlimited (by available RAM only)
Max. no. of mailboxes	unlimited (by available RAM only)
Max. no. of semaphores (resource/binary/counting)	unlimited (by available RAM only)
Max. no. of software timers	unlimited (by available RAM only)
Max. no. of priorities	255
Stack size idle task (RAM)	0(no memory needed)
Nested interrupts	permitted
Task switches from within ISR	possible

Absolute data given above were measured with embOS release build on an R32C CPU running at 48MHz in NEAR data memory model.

embOSView offers system analysis during runtime

embOSView with Renesas R32C CPU

Available Emulators

RENESAS E30A

Additional information

Release Notes embOS R32C for IAR R32C compiler
IAR Web site for additional compiler info / support
RENESAS Web site for additional CPU info / support