embOS for TI MSP430 & MSP430x CPUs and IAR compiler

embOS for Texas Instruments MSP430 & MSP430x was developed for and with IAR's compiler V4.10A and supports nearly all memory models offered by this compiler.
It comes with easy to use start workspaces and start projects for IAR's embedded workbench.
Software development with CSpy simulator or MSP430 Flash Emulation Tool using CSpy is supported.

Resources and performance data

Memory usage
Kernel size (ROM)	1587 bytes
Kernel RAM usage	28 bytes
RAM usage per task control block	18 bytes
RAM usage per resource semaphore	4 bytes
RAM usage per counting semaphore	2 bytes
RAM usage per mailbox	12 bytes
RAM usage per software timer	10 bytes
RAM usage event	0 bytes
Min. stack-size per task (RAM)	48 bytes
Timing
Context switch time	270 clock cycles (67.5 µs), independent of number of tasks
Interrupt latency time	max. 151 clock cycles (37.8 µs)
Kernel CPU usage/TICK	less than 1% of total calculation time at 1000 Interrupts/second (1ms TICK)
Basic time unit (TICK)	typ. 1 ms, min. 100 µs (10 kHz interrupt frequency)
Features
Max. no. of tasks	Unlimited (by available RAM only)
Max. no. of mailboxes	unlimited (by available RAM only)
Max. no. of semaphores (resource/binary/counting)	unlimited (by available RAM only)
Max. no. of software timers	unlimited (by available RAM only)
Max. no. of priorities	255
Stack size idle task (RAM)	0(no memory needed)
Nested interrupts	permitted
Task switches from within ISR	possible

Absolute data given above were measured with embOS release build on an MSP430F149 CPU running at 4.8MHz.

embOSView offers system analysis during runtime

embOSView with MSP430 CPU

Available Emulators

Texas Instruments
J-Link430

Additional information

Release Notes embOS MSP430 for IAR compiler
IAR Web site for additional compiler info / support