A version for the older IAR compiler version V3.20A is available on request. Please refer to release notes below.
| Kernel size (ROM) |
1281 bytes |
| Kernel RAM usage |
28 bytes |
| RAM usage per task control block |
18 bytes |
| RAM usage per resource semaphore |
4 bytes |
| RAM usage per counting semaphore |
2 bytes |
| RAM usage per mailbox |
12 bytes |
| RAM usage per software timer |
12 bytes |
| RAM usage event |
0 bytes |
| Min. stack-size per task (RAM) |
42 bytes |
| Context switch time |
346 clock cycles (21.6 µs), independent of number of tasks |
| Interrupt latency time |
max. 122 clock cycles (7.6 µs) |
| Kernel CPU usage/TICK |
less than .4% of total calculation time at 1000 Interrupts/second
(1ms TICK) |
| Basic time unit (TICK) |
typ. 1 ms, min. 20 µs (50 kHz interrupt frequency) |
| Max. no. of tasks |
Unlimited (by available RAM only) |
| Max. no. of mailboxes |
unlimited (by available RAM only) |
| Max. no. of semaphores (resource/binary/counting) |
unlimited (by available RAM only) |
| Max. no. of software timers |
unlimited (by available RAM only) |
| Max. no. of priorities |
255 |
| Stack size idle task (RAM) |
0(no memory needed) |
| Nested interrupts |
permitted |
| Task switches from within ISR |
possible |
Absolute timings given above were measured with embOS
release build on an MB30624 CPU running at 16MHz in NEAR memory model.