| Kernel size (ROM) |
approx. 1700 bytes |
| Kernel RAM usage |
46 bytes |
| RAM usage per task control block |
32 bytes |
| RAM usage per resource semaphore |
8 bytes |
| RAM usage per counting semaphore |
2 bytes |
| RAM usage per mailbox |
20 bytes |
| RAM usage per software timer |
20 bytes |
| RAM usage event |
0 bytes |
| Min. stack-size per task (RAM) |
64 bytes |
| Context switch time |
984 clock cycles (20.5 µs), independent of number of tasks |
| Interrupt latency time |
Zero for high priority interrupts
max. 444 clock cycles (9.25 µs) for low priority interrupts
|
| Kernel CPU usage/TICK |
less than .2% of total calculation time at 1000 Interrupts/second
(1ms TICK) |
| Basic time unit (TICK) |
typ. 1 ms, min. 20 µs (50 kHz interrupt frequency) |
| Max. no. of tasks |
Unlimited (by available RAM only) |
| Max. no. of mailboxes |
unlimited (by available RAM only) |
| Max. no. of semaphores (resource/binary/counting) |
unlimited (by available RAM only) |
| Max. no. of software timers |
unlimited (by available RAM only) |
| Max. no. of priorities |
255 |
| Stack size idle task (RAM) |
0(no memory needed) |
| Nested interrupts |
permitted |
| Task switches from within ISR |
possible |
Absolute timings given above were measured with embOS
release build on an MB91362 CPU running at 48MHz.