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embOS for AVR32 CPUs and IAR compiler

embOS for AVR32 was developed for and with IAR's compiler version 2.21 and supports all memory models offered by this compiler. It comes with easy to use start projects for IAR's embedded workbench.

Resources and performance data

Memory usage
RAM usage per task control block 36 bytes
RAM usage per resource semaphore 16 bytes
RAM usage per counting semaphore 8 bytes
RAM usage per mailbox 24 bytes
RAM usage per software timer 20 bytes
RAM usage event 20 bytes
Min. stack-size per task (RAM) 44 bytes
Timing
Context switch time 7.88 µs, independent of number of tasks
Interrupt latency time zero
Kernel CPU usage/TICK less than .2% of total calculation time at 1000 Interrupts/second (1ms TICK)
Basic time unit (TICK) typ. 1 ms, min. 20 µs (50 kHz interrupt frequency)
Features
Max. no. of tasks Unlimited (by available RAM only)
Max. no. of mailboxes unlimited (by available RAM only)
Max. no. of semaphores (resource/binary/counting) unlimited (by available RAM only)
Max. no. of software timers unlimited (by available RAM only)
Max. no. of priorities 255
Stack size idle task (RAM) 0(no memory needed)
Nested interrupts permitted
Task switches from within ISR possible

Absolute values given above were measured with embOS release build on an AVR32A CPU (AT32UC3A0512) running at 66 MHz.

embOSView offers system analysis during runtime

embOSView with AVR32 target CPU

Available Emulators

Additional information

Release Notes embOS AVR32 for IAR compiler

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Last update: December 7, 2007