embOS for ATMEL AT90 / ATMega CPUs and IAR AVR compiler

embOS for ATMEL AVR / AT90 was developed for and with IAR's AVR compiler and supports the small memory model offered by this compiler. It comes with an easy to use start workspace and start projects for IAR's embedded workbench.

Resources and performance data

Memory usage
Kernel size (ROM)	1974 bytes
Kernel RAM usage	25 bytes
RAM usage per task control block	18 bytes
RAM usage per resource semaphore	6 bytes
RAM usage per counting semaphore	2 bytes
RAM usage per mailbox	8 bytes
RAM usage per software timer	8 bytes
RAM usage event	0 bytes
Min. stack-size per task (RAM)	100 bytes
Timing
Context switch time	346 clock cycles (49.4 µs), independent of number of tasks
Interrupt latency time	max. 168 clock cycles (24 µs)
Kernel CPU usage/TICK	less than 2% of total calculation time at 1000 Interrupts/second (1ms TICK)
Basic time unit (TICK)	typ. 1 ms, min. 50 µs (20 kHz interrupt frequency)
Features
Max. no. of tasks	Unlimited (by available RAM only)
Max. no. of mailboxes	unlimited (by available RAM only)
Max. no. of semaphores (resource/binary/counting)	unlimited (by available RAM only)
Max. no. of software timers	unlimited (by available RAM only)
Max. no. of priorities	255
Stack size idle task (RAM)	0(no memory needed)
Nested interrupts	permitted
Task switches from within ISR	possible

Absolute timings given above were measured with embOS release build on an ATMega128 CPU running at 7.3728MHz.

embOSView offers system analysis during runtime

embOSView with ATMega CPU

Available Emulators

ATMEL
ADTEC

Additional information

Release Notes embOS AVR for IAR compiler
IAR Web site for additional compiler info / support V
ATMEL Web site for additional CPU info / support V