SH2A, IAR

embOS for SH2A was developed for and with IAR compiler.
It comes with a start project for the RENESAS RSK7203 eval kit and supports CPUs with or without floating point unit.

Resources and performance data

Memory usage
Kernel size (ROM)	app. 2.0 Kbytes
Kernel RAM usage	49 bytes
RAM usage per task control block	40 bytes
RAM usage per resource semaphore	16 bytes
RAM usage per counting semaphore	8 bytes
RAM usage per mailbox	24 bytes
RAM usage per software timer	20 bytes
RAM usage event	0 bytes
Min. stack-size per task (RAM)	approx. 70/160 bytes (without/with FPU)
Timing
Context switch time	less than 1.7us
Interrupt latency time	0
Kernel CPU usage/TICK	less than .1% of total calculation time at 1000 Interrupts/second (1ms TICK)
Basic time unit (TICK)	typ. 1 ms, min. 20 µs (50 kHz interrupt frequency)
Features
Max. no. of tasks	Unlimited (by available RAM only)
Max. no. of mailboxes	unlimited (by available RAM only)
Max. no. of semaphores (resource/binary/counting)	unlimited (by available RAM only)
Max. no. of software timers	unlimited (by available RAM only)
Max. no. of priorities	255
Stack size idle task (RAM)	0(no memory needed)
Nested interrupts	permitted
Task switches from within ISR	possible

Absolute values given above were measured with embOS release build on an SH2 CPU running at 200 MHz.

embOSView offers system analysis during runtime

Available Emulators

• Renesas

Additional information

RENESAS Web site for additional CPU info / support

---

Release notes

1. Tool chain used for build
2. Performance
3. New features
4. Improvements
5. Program corrections
6. Known problems
7. Release history
8. Miscellaneous

Tool chain used for build

The following tools have been used:

Compiler:  IAR ICCSH     2.10.3 (2.10.3.40050)
Assembler: IAR IASMSH    2.10.1 (2.10.1.40038)
Librarian: IAR IARCHIVE  9.2.2.6 (9.2.2.6)
Workbench: IAR IARIDEPM  6.0.1.1438

Performance

1. Task switch time
   < 1.2us
2. Interrupt latency for Fast interrupt
   zero

New features

Version 3.82g

1. NONE, Initial release
   This initial release of embOS SH2A for IAR compiler is based on embOS sources 3.82f.

Improvements

Version 3.82g

1. NONE, Initial release
   This initial release of embOS SH2A for IAR compiler is based on embOS sources 3.82f.

Program corrections

Version 3.82g

1. NONE, Initial release
   This initial release of embOS SH2A for IAR compiler is based on embOS sources 3.82f.

Known problems / Limitations

NONE

Release history

Version	Release date	Short explanation
V3.82g	23. Apr 2010	Initial release, based on embOS V3.82g

Miscellaneous

This document was first released with version 3.82g of the software.
Software released earlier is documented internally.
This information is available at request.