
J-Link
JTAG/SWD Emulator with USB interface
J-Link is a USB powered JTAG emulator supporting a large number of CPU cores.
Based on a 32-bit RISC CPU, it can communicate at high speed with the supported target CPUs. J-Link is used around the world in tens of thousand places for development and production (flash programming) purposes.
J-Link support is integrated in most professional IDEs such as IAR, Keil, Rowley and many others.
Along with the OEM version (such as IAR J-Link, ATMEL SAM-Ice and others) more than 60,000 J-Links have been sold so far, making J-Link probably the most popular emulator for ARM cores and the de-facto standard.
Features
- Direct download into flash memory of most popular microcontrollers supported
- USB 2.0 interface
- Supported CPUs: Any ARM7,9,11, Cortex-M0, M1, M3, M4, R4, Renesas RX
- Serial Wire Debug (SWD) support
- Serial Wire Viewer (SWV) support
- Automatic core recognition
- JTAG speed up to 12 MHz
- Download speed up to 720 Kbytes/second (ARM7 @ 50 MHz, 12MHz JTAG speed)
- Seamless integration into the IAR Embedded Workbench IDE
- No power supply required, powered through USB
- Support for adaptive clocking
- All JTAG signals can be monitored, target voltage can be measured
- Support for multiple devices
- Fully plug and play compatible
- Standard 20-pin JTAG connector
- Wide target voltage range: 1.2V - 3.3V, 5V tolerant
- USB and 20-pin ribbon cable included
- Memory viewer (J-Mem) included
- TCP/IP server included, which allows using J-Link via TCP/IP networks
- RDI interface available, which allows using J-Link with RDI compliant software
- Flash programming software (J-Flash) available
- Flash DLL available, which allows using flash functionality in custom applications
- Software Developer Kit (SDK) available
- Embedded Trace Buffer (ETB) support
- 14-pin JTAG adapter available
- Optical isolation adapter available
- Target power supply: J-Link can supply up to 300 mA to target with overload protection
Available Software Packages
J-Link Flash Breakpoints
The J-Link software contains an additional feature, called Flash Breakpoints.
Flash breakpoints allow the user to set an unlimited number of software breakpoints when debugging in flash memory.
This feature is also available for J-Link RDI.More info...
J-Flash
J-Flash is a PC software running on Windows 2000/XP systems, which enables you to program your Flash EEPROM devices via the On-Chip Debug connector (JTAG) on your target system.More info...
J-Link GDB Server
The J-Link GDB Server is a remote server for the GDB.
The GDB and GDB Server communicate via a TCP/IP connection, using the standard GDB remote serial protocol.
The GDB Server translates the GDB monitor commands into J-Link commands.More info...
J-Link SDK
The J-Link DLL is a standard Windows DLL typically used from "C" (Visual Basic or Delphi projects are also doable).
It makes the entire functionality of J-Link available thru the exported functions.More info...
J-Link Flash SDK
An enhanced version of the J-Link SDK, which contains additional API functions for flash programming.
The additional API functions (Prefixed JLINKARM_FLASH) allow erasing and programming the internal flash memory of many ARM 7/9 and Cortex-M3 MCUs.More info...
J-Link ARM RDI
The J-Link ARM RDI software is an RDI interface for J-Link.
It makes it possible to use J-Link with any RDI compliant debugger.More info...
Available bundles including J-Link ARM
The following table shows the features which are included in the available J-Link bundles.
| J-Link RDI/GDB-Server bundle | J-Link Pro bundle | J-Link J-Flash bundle | |
|---|---|---|---|
| Flash Breakpoints | |||
| GDB Server | |||
| RDI | |||
| J-Flash |
Specifications *
| General | |
|---|---|
| Supported OS | Microsoft Windows 2000 Microsoft Windows XP Microsoft Windows XP x64 Microsoft Windows 2003 Microsoft Windows 2003 x64 Microsoft Windows Vista Microsoft Windows Vista x64 Windows 7 Windows 7 x64 |
| Electromagnetic compatibility (EMC) | EN 55022, EN 55024 |
| Operating temperature | +5°C ... +60°C |
| Storage temperature | -20°C ... +65 °C |
| Relative humidity (non-condensing) | Max. 90% rH |
| Mechanical | |
| Size (without cables) | 100mm x 53mm x 27mm |
| Weight (without cables) | 70g |
| Available Interfaces | |
| USB interface | USB 2.0, full speed |
| Target interface | JTAG 20-pin (14-pin adapter available) |
| JTAG/SWD Interface, Electrical | |
| Power supply | USB powered Max. 50mA + Target Supply current. |
| Target interface voltage (VIF) | 1.2V ... 5V |
| Target supply voltage | 4.5V ... 5V (if powered with 5V on USB) |
| Target supply current | Max. 300mA |
| Reset Type | Open drain. Can be pulled low or tristated. |
| Reset low level output voltage (VOL) | VOL <= 10% of VIF |
| For the whole target voltage range (1.8V <= VIF <= 5V) | |
| LOW level input voltage (VIL) | VIL <= 40% of VIF |
| HIGH level input voltage (VIH) | VIH >= 60% of VIF |
| For 1.8V <= VIF <= 3.6V | |
| LOW level output voltage (VOL) with a load of 10 kOhm | VOL <= 10% of VIF |
| HIGH level output voltage (VOH) with a load of 10 kOhm | VOH >= 90% of VIF |
| For 3.6 <= VIF <= 5V | |
| LOW level output voltage (VOL) with a load of 10 kOhm | VOL <= 20% of VIF |
| HIGH level output voltage (VOH) with a load of 10 kOhm | VOH >= 80% of VIF |
| JTAG/SWD Interface, Timing | |
| SWO sampling frequency | Max. 6MHz |
| Data input rise time (Trdi) | Trdi <= 20ns |
| Data input fall time (Tfdi) | Tfdi <= 20ns |
| Data output rise time (Trdo) | Trdo <= 10ns |
| Data output fall time (Tfdo) | Tfdo <= 10ns |
| Clock rise time (Trc) | Trc <= 10ns |
| Clock fall time (Tfc) | Tfc <= 10ns |
* J-Link hardware revision 8 and up
J-Link
Head office Germany
US office 
