emWin driver

A display driver supports a particular family of display controllers and all displays
which are connected to one or more of these controllers. The drivers can be configured
by modifying their configuration files wheras the driver itself does not need to
be modified. The configuration files contain all required information for the driver
including how the hardware is accessed and how the controller(s) are connected to
the display.

Driver	Supported controllers	Supported bits/pixel
GUIDRV_Lin	emWin driver supporting each display controller with linear addressable video memory with a direct interface. This means that the video RAM is directly addressable by the address lines of the CPU. The driver contains no controller specific code. So it can also be used for solutions without display contoller which requide a driver which only manages the video RAM. This driver supports nearly all built-in display controllers.	1, 2, 4, 8, 16, 24, 32
GUIDRV_SLin	emWin driver supporting Epson S1D13700 (indirect interface only!) Solomon SSD1848 UltraChip UC1617	1, 2
GUIDRV_SSD1926	emWin driver supporting Solomon SSD1926	8
GUIDRV_BitPlains	emWin driver supporting solutions without display controller. It manages separate ’bitplains’ for each color bit. Initially it has been developed to support a solution for an R32C/111 which drives a TFT display without display controller. It can be used for each solution which require the color bits in separate plains.	1 - 8
GUIDRV_Page1bpp	emWin driver supporting Epson SED1520, SED1560, SED1565, SED1566, SED1567, SED1568, SED1569, SED1575, S1D15710, S1D10605, S1D15705, S1D15721, S1D15E06 Hitachi HD61202 New Japan Radio Company NJU6679 Novatec NT7502 Philips PCF8810, PCF8811, PCF8535, PCD8544 Samsung KS0713, KS0724, KS0108B, S6B1713, S6B0724, S6B0108B, S6B1713 Sitronix ST7565 Solomon SSD1815 Sunplus SPLC501C UltraChip UC1601, UC1606	1
GUIDRV_1611	emWin driver supporting Epson S1D15E05, S1D15E06, S1D15719 UltraChip UC1611 UltraChip UC1610	2 4 2
GUIDRV_6331	emWin driver supporting Samsung S6B33B0X, S6B33B1X, S6B33B2X	16
GUIDRV_CompactColor_16	emWin driver supporting Epson S1D13743, S1D19122 Himax HX8301, HX8312A, HX8347, HX8340 Hitachi HD66766, HD66772, HD66789 Ilitek ILI9161, ILI9220, ILI9320, ILI9325 LG Electronics LGDP4531 MagnaChip D54E4PA7551 Novatek NT39122, NT7573 OriseTech SPFD5408, SPFD5420A, SPFD5414D Renesas R63401, R61509, R61516, R61505, R61580 Samsung S6D0110A, S6D0117, S6D0129 Sharp LR38825, LCY-A06003 Sitronix ST7712, ST7628, ST7637 Solomon SSD1289, SSD1298, SSD1355, SSD1963, SSD2119 Toshiba JBT6K71	16
GUIDRV_7529	emWin driver supporting Sitronix ST7529	1, 4, 5
GUIDRV_Fujitsu_16	emWin driver supporting Fujitsu Jasmine (MB8J2020), Lavender (MB8J2120)	16
GUIDRV_S1D15G00	emWin driver supporting Epson S1D15G00	12

Note: If you are looking for a display driver, which is not listed in the table above, please contact info@segger.com. Most display drivers for standard target hardware will usually be developed and sold without additional charge.

CPU / Display controller interface

Different display controllers can have different CPU interfaces. Basically there are 2
different interfaces:

Direct interface
Indirect interface

Wheras the direct interface accesses the video memory directly by the address bus of
the CPU, the indirect interface requires a more complex communication with the display
controller to get access to the video memory. This can be done by different kinds
of connections:

Parallel access
4 pin SPI interface
3 pin SPI interface
I2C bus interface

The following explains these interfaces and how to configure them. Note that not all
configuration macros are always required. For details about which macros are
required, refer to the specific display driver pages.

Direct interface

Some display controllers (especially those for displays with higher resolution) require
a direct address bus, which means they are connected to at least 14 address bits. In a
direct interface configuration, video memory is directly accessible by the CPU; the
address bus is connected to the display controller.
The only knowledge required when configuring a direct interface is information about
the address range (which will generate a CHIP-SELECT signal for the LCD controller)
and whether 8-, 16- or 32-bit accesses should be used (bus-width to the display controller).
In other words, you need to know the following:

Base address for video memory access
Base address for register access
Distance between adjacent video memory locations (usually 1/2/4-byte)
Distance between adjacent register locations (usually 1/2/4-byte)
Type of access (8/16/32-bit) for video memory
Type of access (8/16/32-bit) for registers

Typical block diagram

Indirect interface - Parallel bus

Most controllers for smaller displays use an indirect interface to connect to the CPU.
With an indirect interface, only one address bit (usually A0) is connected to the LCD
controller. Some of these controllers are very slow, so that the hardware designer
may decide to connect it to input/output (I/O) pins instead of the address bus.

Typical block diagram

8 (16) data bits, one address bit and 2 or 3 control lines are used to connect the CPU
and one LCD controller. Four macros inform the LCD driver how to access each controller
used. If the LCD controller(s) is connected directly to the address bus of the
CPU, configuration is simple and usually consists of no more than one line per macro.
If the LCD controller(s) is connected to I/O pins, the bus interface must be simulated,
which takes about 5-10 lines of program per macro (or a function call to a routine
which simulates the bus interface). The signal A0 is also called C/D (Command/
Data), D/I (Data/Instruction) or RS (Register select), depending on the display controller.

Example routines for connection to I/O pins

Examples can be found in the folder SampleLCD_X:

LCD_X_6800.c, port routines for the 6800 parallel interface.
LCD_X_8080.c, port routines for the 8080 parallel interface.

Indirect interface - 4 pin SPI

Using a 4 pin SPI interface is very similar to a parallel interface. To connect a LCD
display using 4 pin SPI interface the lines A0, CLK, DATA, and CS must be connected
to the CPU.

Typical block diagram

Example routines for connection to I/O pins

An example can be found in the folder SampleLCD_X:

LCD_X_SERIAL.c, port routines for a serial interface

Please note that this sample uses port pins for the communication. This works very
slow but on each CPU. This should be optimized by the customer by using the hardware
support of the CPU for this kind of communication.

Indirect interface - 3 pin SPI

To connect a LCD display using 4 pin SPI interface the lines CLK, DATA, and CS must
be connected to the CPU.

Typical block diagram

Example routines for connection to I/O pins

This interface do not have a separate line for distinguish between data and commands
to be transmitted to the display controller. There is no standardized method to
manage this. Some controllers use an additional bit for distinguish between data and
command, other controllers work different.
Examples can be found in the folder SampleLCD_X:

LCD_X_Serial_3Pin.c, port routines for a 3 pin serial interface
LCD_X_Serial_3Wire.c, port routines for a 3 pin serial interface

Indirect interface - I2C bus

This kind of interface use only 2 lines and a standarized protocoll for the communication
with the display controller.

Typical block diagram

Example routines for connection to I/O pins

An example can be found in the folder SampleLCD_X:

LCD_X_I2CBUS.c, port routines for a I2C bus interface

Similar to the serial communication examples this example uses port lines for the
communication which works not very fast. If the CPU support this kind of communication
these routines should be optimized by using the hardware functions.