SEGGER Microcontroller - Embedded Software Solutions

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Embedded Software

emFile

Driver NAND Flash

emFile supports the use of NAND flashes. Two optional drivers for NAND flashes are available:

SLC1 driver
Works with SLC flashes which require 1-bit error correction. It also supports the ATMEL's DataFlashes.
Universal driver
Works with all modern SLC and MLC NAND flashes. It can use the ECC engine build into NAND flashes to correct bit errors.

Features:

Fail safe in case of unexpected RESET
Very high read and write performance
Low RAM usage
Trial hardware available with socket for NAND flash

NAND Flash Eval Board

How to select which driver to use

The first factor is the type of device used. ATMEL's DataFlashes are supported only by the SLC1 driver. NAND flashes are supported by both drivers.

The bit error correction requirements of the NAND flash is the next factor. It indicates how many bit errors the error correcting code (ECC) must be able to correct. If the NAND flash requires only 1-bit correction capability then the SLC1 driver can be used. The SLC1 driver will perform the bit error detection and correction. For more than 1-bit correction capability the Universal driver is required. In order to use the Universal driver, the following conditions must be met:

Page size of minimum 2048 bytes
More specifically: the size spare area corresponding to 512 bytes in the data area must be greater than 16 bytes.

Hardware support for error correction
Either a NAND flash with internal ECC engine or another way to compute the ECC in hardware (MCU, FPGA, etc.)

The ECC must not exceed 8 bytes in size.

NAND flash organization

A NAND flash is a serial-type memory device which utilizes the I/O pins for both address and data input/output as well as for command inputs. The erase and program operations are automatically executed. To store data on the NAND flash device, it has to be low-level formatted.

NAND flashes consist of a number of blocks. Every block contains a number of sectors, typically 64. The sectors can be written to individually, one at a time. When writing to a sector, bits can only be written from 1 to 0. Only whole blocks (all sectors in the block) can be erased. Erasing means bringing all memory bits in all sectors of the block to logical 1.

Small NAND flashes (up to 256 Mbytes) have a page size of 528 bytes, 512 for data + 16 spare bytes for storing relevant information (ECC, etc.) to the page. Large NAND devices (256 Mbytes or more) typically have a page size of 2112 bytes, 2048 bytes for data + 64 bytes for storing relevant information to the page.

Driver can handle any common page and block size, as well as sector sizes smaller than page size. This allows using a file system with either 512, 1024 or 2048 bytes per sector on a NAND flash with 2K pages.

For example, a typical NAND flash with a size of 256 MBytes has 2048 blocks of 64 sectors of 2112 bytes (2048 bytes for data + 64 bytes spare area).

Pin description

NAND flash

Pin	Driver (Device)
CE	CHIP ENABLE The CE input enables the device. Signal is active low. If the signal is inactive, device is in standby mode.
WE	WRITE ENABLE The WE input controls writes to the I/O port. Commands, address and data are latched on the rising edge of the WE pulse.
RE	READ ENABLE The RE input is the serial data-out control. When active (low) the device outputs data.
CLE	COMMAND LATCH ENABLE This pin should be low, when writing commands to the command register.
ALE	ADDRESS LATCH ENABLE When active, an address can be written.
WP	WRITE PROTECT Typically connected to VCC (recommended), but may also be connected to port pin.
R/B	READY/BUSY OUTPUT The R/B output indicates the status of the device operation. When low, it indicates that a program, erase or read operation is in process. It returns to high state when the operation is completed. It is an open drain output. Should be connected to a port pin with pull-up. If available a port pin which can trigger an interrupt should be used.
I/O₀ - I/O₇	DATA INPUTS/OUTPUTS The I/O pins are used to input command, address and data, and to output data during read operations.
I/O₈ - I/O₁₅	DATA INPUTS/OUTPUTS I/O₈ - I/O₁₅ 16-bit flashes only.

DataFlash

DataFlash chips are commonly used when low pin count and easy data transfer are required. DataFlash devices use the following pins:

Pin	Meaning
CS	ChipSelect This pin selects the DataFlash device. The device is selected, when CS pin is driven low.
SCLK	Serial Clock The SCLK pin is an input-only pin and is used to control the flow of data to and from the DataFlash. Data is always clocked into the device on the rising edge of SCLK and clocked out of the device on the falling edge of SCLK.
SI	Serial Data In The SI pin is an input-only pin and is used to transfer data into the device. The SI pin is used for all data input including opcodes and address sequences.
SO	Serial Data Out This SO pin is an output pin and is used to transfer data serially out of the device.

Data transfer width is 8 bit.
Chip Select (CS) sets the card active at low-level and inactive at high level.
Clock signal must be generated by the target system. The serial flash chips are always in slave mode.
Bit order requires most significant bit (MSB) to be sent out first.

To setup all these requirements, the NAND flash driver will call the function FS_DF_HW_X_Init(), therefore the function FS_DF_HW_X_Init() can be used to initialize the SPI bus.