78K4 series, IAR

embOS for NEC 78K4 series was developed for and with IAR's compiler and by now supports the large memory model offered by this compiler. It comes with an easy to use start project for IAR's embedded workbench. Software development with NEC debugger, simulator and CSpy simulator is supported.

Resources and performance data

Memory usage
Kernel size (ROM)	1401 bytes
Kernel RAM usage	31 bytes
RAM usage per task control block	22 bytes
RAM usage per resource semaphore	5 bytes
RAM usage per counting semaphore	2 bytes
RAM usage per mailbox	12 bytes
RAM usage per software timer	11 bytes
RAM usage event	0 bytes
Min. stack-size per task (RAM)	120 bytes
Timing
Context switch time	142 µs, independent of number of tasks
Interrupt latency time	better 56 µs
Kernel CPU usage/TICK	less than 1% of total calculation time at 1000 Interrupts/second (1ms TICK)
Basic time unit (TICK)	typ. 1 ms, min. 100 µs (10 kHz interrupt frequency)
Features
Max. no. of tasks	Unlimited (by available RAM only)
Max. no. of mailboxes	unlimited (by available RAM only)
Max. no. of semaphores (resource/binary/counting)	unlimited (by available RAM only)
Max. no. of software timers	unlimited (by available RAM only)
Max. no. of priorities	256
Stack size idle task (RAM)	0(no memory needed)
Nested interrupts	permitted
Task switches from within ISR	possible

Absolute timings given above were measured with embOS release build on an 78K4 CPU running at 16MHz in LARGE memory model.

embOSView offers system analysis during runtime

Available Emulators

• NEC

Additional information

IAR Web site for additional compiler info / support

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Release notes

1. Tool chain used for build
2. New features
3. Improvements
4. Program corrections
5. Known problems / limitations
6. Release history
7. Miscellaneous

Updated:
2001-08-15 [AW] V3.06d

Tool chain used for build

The following tools have been used:

Compiler:  IAR ICC78400
Assembler: IAR A78400
Librarian: IAR XLIB
Workbench: IAR EW231   V2.31b

New features

Version 3.06d

1. Separate interrupt stack supported

Interrupts use a separate interrupt stack, so that interrupts do not use the task stacks. This reduces the required stack for every task.

Version 3.06

1. Upgrade from Version 2.2

embOS for 78K4 using IAR compiler was upgraded to version 3.06 with all features of actual embOS version 3.06 including embOSView

Improvements

Version 3.06

1. Context switching time

Context switching time has been measured as follows: 142us

2. Interrupt latency

Interrupt latency has been measured as follows: 56us
Measurements were taken with a target running in LARGE memory model with 8bit external memory running at 16MHz

Program corrections

Version 3.06d

1. Problem with Far code fixed.

Version 3.06

None.

Known problems / limitations

Version 3.06d

1. Register bank usage

Initial register bank is fixed to bank 0 for embOS. Register bank 1 is also used by embOS for interrupt stack switching.

Version 3.06

1. Actual Version 3.06 is available for the LARGE memory model only.

Release history

Version	Release date	Short explanation
V3.06d	15.Aug.2001	Interrupt stack switching supported
V3.06	02.Aug.2001	First version with release history

Miscellaneous

This document was first released with version 3.06 of the software. Software released earlier is documented internally. This information is available at request.