Embedded Artists LPC2478 OEM QVGA Eval board
Embedded Artists LPC2478 OEM QVGA
Controller:
CPU:
OEM Board main features:
- NXP LPC2478 (ARM7TDMI-S) microcontroller in BGA package
- 128 MB external NAND flash
- 4 MB external NOR flash
- 512 kB internal flash
- 32 MB external SDRAM
- 96 KB internal RAM
- 32- or 16-bit data bus to SDRAM
- 100/10 MBit Ethernet interface based on National DP83848 Ethernet PHY
- 12.000 MHz crystal for CPU
- 32.768 kHz crystal for RTC
- 200 pos expansion connector (as defined in SODIMM standard), 0.6mm pitch
- 256 Kbit I2C E2PROM for storing non-volatile parameters
- Buffered 32- or 16-bit databus
Base board main features:
- 3.2 inch QVGA TFT color LCD with touch screen panel
- 200 pos SODIMM connector for OEM Board
- Expansion connector with all LCD controller signals, for custom displays
- Expansion connector with all cpu signals
- Ethernet connector (RJ45)
- MMC/SD interface & connector
- CAN interface & connector
- JTAG connector
- Pads for ETM connector
- USB OTG interface & connector
- USB host interface & connector
- Full modem RS232 on UART #1 (cannot be used on 32-bit databus cpu boards, but RxD2/TxD2 can alternatively be connected to the RS232 interface)
- Dual CAN interface & connector
- Power supply, either via USB or external 9-15V DC
- 0.3F capacitor backup for RTC and LED on ALARM output
- 5-key joystick
- Push-button key and LED on P2.10
- 4 push-button keys via I2C
- 8 LEDs (via I2C)
- 1 Analog inputs
- USB-to-serial bridge on UART #0, and ISP functionality
- Reset push-button and LED
- Speaker output (DAC)
Controller main features:
- ARM7TDMI-S processor, running at up to 72 MHz.
- 512 kB on-chip flash program memory with In-System Programming (ISP) and In-Application Programming (IAP) capabilities. Flash program memory is on the ARM local bus for high performance CPU access.
- 98 kB on-chip SRAM includes:
- 64 kB of SRAM on the ARM local bus for high performance CPU access.
- 16 kB SRAM for Ethernet interface. Can also be used as general purpose SRAM.
- 16 kB SRAM for general purpose DMA use also accessible by the USB.
- 2 kB SRAM data storage powered from the RTC power domain.
LCD controller, supporting both Super-Twisted Nematic (STN) and Thin-Film Transistors (TFT) displays.Dedicated DMA controller.Selectable display resolution (up to 1024 × 768 pixels).Supports up to 24-bit true-color mode.Dual Advanced High-performance Bus (AHB) system allows simultaneous Ethernet DMA, USB DMA, and program execution from on-chip flash with no contention.EMC provides support for asynchronous static memory devices such as RAM, ROM and flash, as well as dynamic memories such as Single Data Rate SDRAM.Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts.General Purpose AHB DMA controller (GPDMA) that can be used with the SSP, I2S, and SD/MM interface as well as for memory-to-memory transfers.Serial Interfaces:Ethernet MAC with MII/RMII interface and associated DMA controller. These functions reside on an independent AHB bus.USB 2.0 full-speed dual-port device/host/OTG controller with on-chip PHY and associated DMA controller.Four UARTs with fractional baud rate generation, one with modem control I/O, one with IrDA support, all with FIFO.CAN controller with two channels.SPI controller.Two SSP controllers, with FIFO and multi-protocol capabilities. One is an alternate for the SPI port, sharing its interrupt. SSPs can be used with the GPDMA controller.Three I2C-bus interfaces (one with open-drain and two with standard port pins).I2S (Inter-IC Sound) interface for digital audio input or output. It can be used with the GPDMA.Other peripherals:SD/MMC memory card interface.160 General purpose I/O pins with configurable pull-up/down resistors.10-bit ADC with input multiplexing among 8 pins.10-bit DAC.Four general purpose timers/counters with 8 capture inputs and 10 compare outputs. Each timer block has an external count input.Two PWM/timer blocks with support for three-phase motor control. Each PWM has an external count inputs.Real-Time Clock (RTC) with separate power domain. Clock source can be the RTC oscillator or the APB clock.2 kB SRAM powered from the RTC power pin, allowing data to be stored when the rest of the chip is powered off.WatchDog Timer (WDT). The WDT can be clocked from the internal RC oscillator, the RTC oscillator, or the APB clock.Single 3.3 V power supply (3.0 V to 3.6 V).4 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used as the system clock.Three reduced power modes: idle, sleep, and power-down.Four external interrupt inputs configurable as edge/level sensitive. All pins on PORT0 and PORT2 can be used as edge sensitive interrupt sources.Processor wake-up from Power-down mode via any interrupt able to operate during Power-down mode (includes external interrupts, RTC interrupt, USB activity, Ethernet wake-up interrupt, CAN bus activity, PORT0/2 pin interrupt).Two independent power domains allow fine tuning of power consumption based on needed features.Each peripheral has its own clock divider for further power saving. These dividers help reducing active power by 20 - 30 %.Brownout detect with separate thresholds for interrupt and forced reset.On-chip power-on reset.On-chip crystal oscillator with an operating range of 1 MHz to 24 MHz.On-chip PLL allows CPU operation up to the maximum CPU rate without the need for a high frequency crystal. May be run from the main oscillator, the internal RC oscillator, or the RTC oscillator.Boundary scan for simplified board testing.Versatile pin function selections allow more possibilities for using on-chip peripheral functions.Standard ARM test/debug interface for compatibility with existing tools.Emulation trace module supports real-time trace.Available software:
Available documentation:
Included software components:
Eval package:
The eval packages have been designed to provide customers and potential customers with a complete, easy to use software package for the specified target hardware and target compiler. They allow to easily check out the target hardware, the target compiler and our software components. This evaluation process typically does not take a lot of time since the software can be easily recompiled and downloaded to the target.
Some packages are executable demos, which can not be modified; some packages are trial versions, which come with the software in a library and the application in source code form, as well as a project for the IDE that has been used. Trial versions can usually be recompiled easily in less than a minute if the required compiler and IDE is installed. The application program can be modified, allowing intensive testing the hard- and software for fitnes. emWin trial versions usually also contain a simulation environment which allows test and recompilation on a PC.
USB examples:
| The eval package includes USB bulk samples for simple data transfer between target and PC as well as device class samples, such as MSD, HID and CDC. |
Filesystem examples:
 | The file system samples show basic directory and file operations. |
TCP / IP examples:
 | The TCP/IP samples include ready to run client/server applications such as FTPserver, webserver and telnet server. The webserver sample uses the data stored in the file system (emFile), any storage media, such as MMC as data source for your webserver pages can be used. Built in pseudo CGI scripts known by the server can be used on every page.  CGI scripts for embOS statistics are already included as sample.  Using the emFile/FTP server sample, data between the target and any other client using ethernet and FTP protocol can be transfered. Data, such as text, pictures etc. can be stored on any storage media accessible by emFile, target firmware updates can be done via FTP Server using a bootloader. GUI based applications can be controlled via LAN or internet using the emWin VNC Server. It allows the user to view and control a computing 'desktop' environment from anywhere on the Internet and from a wide variety of machine architectures, communicating via TCP/IP. Input devices such as mouse support can be used to control the application via PC, even if the target hardware does not support this input device. The sample included demonstrates the TCP/IP Stack (embOS/IP) and emWin VNC Server showing a house control application.  |